* published by the Free Software Foundation.
*/
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
unsigned char id; /* 16xx chips have 2 MMC blocks */
struct clk * iclk;
struct clk * fclk;
- void __iomem *base;
+ struct resource *mem_res;
+ void __iomem *virt_base;
+ unsigned int phys_base;
int irq;
unsigned char bus_mode;
unsigned char hw_bus_mode;
clk_enable(host->fclk);
- OMAP_MMC_WRITE(host->base, CTO, 200);
- OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff);
- OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16);
- OMAP_MMC_WRITE(host->base, IE,
+ OMAP_MMC_WRITE(host, CTO, 200);
+ OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff);
+ OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16);
+ OMAP_MMC_WRITE(host, IE,
OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL |
OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT |
OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT |
OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR |
OMAP_MMC_STAT_END_OF_DATA);
- OMAP_MMC_WRITE(host->base, CMD, cmdreg);
+ OMAP_MMC_WRITE(host, CMD, cmdreg);
}
static void
if (cmd->flags & MMC_RSP_136) {
/* response type 2 */
cmd->resp[3] =
- OMAP_MMC_READ(host->base, RSP0) |
- (OMAP_MMC_READ(host->base, RSP1) << 16);
+ OMAP_MMC_READ(host, RSP0) |
+ (OMAP_MMC_READ(host, RSP1) << 16);
cmd->resp[2] =
- OMAP_MMC_READ(host->base, RSP2) |
- (OMAP_MMC_READ(host->base, RSP3) << 16);
+ OMAP_MMC_READ(host, RSP2) |
+ (OMAP_MMC_READ(host, RSP3) << 16);
cmd->resp[1] =
- OMAP_MMC_READ(host->base, RSP4) |
- (OMAP_MMC_READ(host->base, RSP5) << 16);
+ OMAP_MMC_READ(host, RSP4) |
+ (OMAP_MMC_READ(host, RSP5) << 16);
cmd->resp[0] =
- OMAP_MMC_READ(host->base, RSP6) |
- (OMAP_MMC_READ(host->base, RSP7) << 16);
+ OMAP_MMC_READ(host, RSP6) |
+ (OMAP_MMC_READ(host, RSP7) << 16);
} else {
/* response types 1, 1b, 3, 4, 5, 6 */
cmd->resp[0] =
- OMAP_MMC_READ(host->base, RSP6) |
- (OMAP_MMC_READ(host->base, RSP7) << 16);
+ OMAP_MMC_READ(host, RSP6) |
+ (OMAP_MMC_READ(host, RSP7) << 16);
}
}
mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
{
int n;
- void __iomem *reg;
- u16 *p;
if (host->buffer_bytes_left == 0) {
host->sg_idx++;
host->data->bytes_xfered += n;
if (write) {
- __raw_writesw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
+ __raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
} else {
- __raw_readsw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
+ __raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
}
}
}
}
-static irqreturn_t mmc_omap_irq(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
{
struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id;
u16 status;
int transfer_error;
if (host->cmd == NULL && host->data == NULL) {
- status = OMAP_MMC_READ(host->base, STAT);
+ status = OMAP_MMC_READ(host, STAT);
dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status);
if (status != 0) {
- OMAP_MMC_WRITE(host->base, STAT, status);
- OMAP_MMC_WRITE(host->base, IE, 0);
+ OMAP_MMC_WRITE(host, STAT, status);
+ OMAP_MMC_WRITE(host, IE, 0);
}
return IRQ_HANDLED;
}
end_transfer = 0;
transfer_error = 0;
- while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) {
- OMAP_MMC_WRITE(host->base, STAT, status);
+ while ((status = OMAP_MMC_READ(host, STAT)) != 0) {
+ OMAP_MMC_WRITE(host, STAT, status);
#ifdef CONFIG_MMC_DEBUG
dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
status, host->cmd != NULL ? host->cmd->opcode : -1);
if (status & OMAP_MMC_STAT_CARD_ERR) {
if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
- u32 response = OMAP_MMC_READ(host->base, RSP6)
- | (OMAP_MMC_READ(host->base, RSP7) << 16);
+ u32 response = OMAP_MMC_READ(host, RSP6)
+ | (OMAP_MMC_READ(host, RSP7) << 16);
/* STOP sometimes sets must-ignore bits */
if (!(response & (R1_CC_ERROR
| R1_ILLEGAL_COMMAND
return IRQ_HANDLED;
}
-static irqreturn_t mmc_omap_switch_irq(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t mmc_omap_switch_irq(int irq, void *dev_id)
{
struct mmc_omap_host *host = (struct mmc_omap_host *) dev_id;
int dst_port = 0;
int sync_dev = 0;
- data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA;
- frame = 1 << data->blksz_bits;
+ data_addr = host->phys_base + OMAP_MMC_REG_DATA;
+ frame = data->blksz;
count = sg_dma_len(sg);
- if ((data->blocks == 1) && (count > (1 << data->blksz_bits)))
+ if ((data->blocks == 1) && (count > data->blksz))
count = frame;
host->dma_len = count;
if (unlikely(count > 0xffff))
BUG();
- OMAP_MMC_WRITE(host->base, BUF, buf);
+ OMAP_MMC_WRITE(host, BUF, buf);
omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
frame, count, OMAP_DMA_SYNC_FRAME,
sync_dev, 0);
struct mmc_data *mmcdat = host->data;
if (unlikely(host->dma_ch < 0)) {
- dev_err(mmc_dev(host->mmc), "DMA callback while DMA not
- enabled\n");
+ dev_err(mmc_dev(host->mmc),
+ "DMA callback while DMA not enabled\n");
return;
}
/* FIXME: We really should do something to _handle_ the errors */
- if (ch_status & OMAP_DMA_TOUT_IRQ) {
+ if (ch_status & OMAP1_DMA_TOUT_IRQ) {
dev_err(mmc_dev(host->mmc),"DMA timeout\n");
return;
}
{
u16 reg;
- reg = OMAP_MMC_READ(host->base, SDIO);
+ reg = OMAP_MMC_READ(host, SDIO);
reg &= ~(1 << 5);
- OMAP_MMC_WRITE(host->base, SDIO, reg);
+ OMAP_MMC_WRITE(host, SDIO, reg);
/* Set maximum timeout */
- OMAP_MMC_WRITE(host->base, CTO, 0xff);
+ OMAP_MMC_WRITE(host, CTO, 0xff);
}
static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
/* Check if we need to use timeout multiplier register */
- reg = OMAP_MMC_READ(host->base, SDIO);
+ reg = OMAP_MMC_READ(host, SDIO);
if (timeout > 0xffff) {
reg |= (1 << 5);
timeout /= 1024;
} else
reg &= ~(1 << 5);
- OMAP_MMC_WRITE(host->base, SDIO, reg);
- OMAP_MMC_WRITE(host->base, DTO, timeout);
+ OMAP_MMC_WRITE(host, SDIO, reg);
+ OMAP_MMC_WRITE(host, DTO, timeout);
}
static void
host->data = data;
if (data == NULL) {
- OMAP_MMC_WRITE(host->base, BLEN, 0);
- OMAP_MMC_WRITE(host->base, NBLK, 0);
- OMAP_MMC_WRITE(host->base, BUF, 0);
+ OMAP_MMC_WRITE(host, BLEN, 0);
+ OMAP_MMC_WRITE(host, NBLK, 0);
+ OMAP_MMC_WRITE(host, BUF, 0);
host->dma_in_use = 0;
set_cmd_timeout(host, req);
return;
}
- block_size = 1 << data->blksz_bits;
+ block_size = data->blksz;
- OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1);
- OMAP_MMC_WRITE(host->base, BLEN, block_size - 1);
+ OMAP_MMC_WRITE(host, NBLK, data->blocks - 1);
+ OMAP_MMC_WRITE(host, BLEN, block_size - 1);
set_data_timeout(host, req);
/* cope with calling layer confusion; it issues "single
/* Revert to PIO? */
if (!use_dma) {
- OMAP_MMC_WRITE(host->base, BUF, 0x1f1f);
+ OMAP_MMC_WRITE(host, BUF, 0x1f1f);
host->total_bytes_left = data->blocks * block_size;
host->sg_len = sg_len;
mmc_omap_sg_to_buf(host);
/* GPIO 4 of TPS65010 sends SD_EN signal */
tps65010_set_gpio_out_value(GPIO4, HIGH);
else if (cpu_is_omap24xx()) {
- u16 reg = OMAP_MMC_READ(host->base, CON);
- OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11));
+ u16 reg = OMAP_MMC_READ(host, CON);
+ OMAP_MMC_WRITE(host, CON, reg | (1 << 11));
} else
if (host->power_pin >= 0)
omap_set_gpio_dataout(host->power_pin, 1);
else if (machine_is_omap_h3())
tps65010_set_gpio_out_value(GPIO4, LOW);
else if (cpu_is_omap24xx()) {
- u16 reg = OMAP_MMC_READ(host->base, CON);
- OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11));
+ u16 reg = OMAP_MMC_READ(host, CON);
+ OMAP_MMC_WRITE(host, CON, reg & ~(1 << 11));
} else
if (host->power_pin >= 0)
omap_set_gpio_dataout(host->power_pin, 0);
* which results in the while loop below getting stuck.
* Writing to the CON register twice seems to do the trick. */
for (i = 0; i < 2; i++)
- OMAP_MMC_WRITE(host->base, CON, dsor);
+ OMAP_MMC_WRITE(host, CON, dsor);
if (ios->power_mode == MMC_POWER_UP) {
/* Send clock cycles, poll completion */
- OMAP_MMC_WRITE(host->base, IE, 0);
- OMAP_MMC_WRITE(host->base, STAT, 0xffff);
- OMAP_MMC_WRITE(host->base, CMD, 1<<7);
- while (0 == (OMAP_MMC_READ(host->base, STAT) & 1));
- OMAP_MMC_WRITE(host->base, STAT, 1);
+ OMAP_MMC_WRITE(host, IE, 0);
+ OMAP_MMC_WRITE(host, STAT, 0xffff);
+ OMAP_MMC_WRITE(host, CMD, 1<<7);
+ while (0 == (OMAP_MMC_READ(host, STAT) & 1));
+ OMAP_MMC_WRITE(host, STAT, 1);
}
clk_disable(host->fclk);
}
return host->wp_pin && omap_get_gpio_datain(host->wp_pin);
}
-static struct mmc_host_ops mmc_omap_ops = {
+static const struct mmc_host_ops mmc_omap_ops = {
.request = mmc_omap_request,
.set_ios = mmc_omap_set_ios,
.get_ro = mmc_omap_get_ro,
struct omap_mmc_conf *minfo = pdev->dev.platform_data;
struct mmc_host *mmc;
struct mmc_omap_host *host = NULL;
+ struct resource *r;
int ret = 0;
+ int irq;
- if (platform_get_resource(pdev, IORESOURCE_MEM, 0) ||
- platform_get_irq(pdev, IORESOURCE_IRQ, 0)) {
- dev_err(&pdev->dev, "mmc_omap_probe: invalid resource type\n");
- return -ENODEV;
- }
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ irq = platform_get_irq(pdev, 0);
+ if (!r || irq < 0)
+ return -ENXIO;
- if (!request_mem_region(pdev->resource[0].start,
+ r = request_mem_region(pdev->resource[0].start,
pdev->resource[0].end - pdev->resource[0].start + 1,
- pdev->name)) {
- dev_dbg(&pdev->dev, "request_mem_region failed\n");
+ pdev->name);
+ if (!r)
return -EBUSY;
- }
mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
if (!mmc) {
host->dma_timer.data = (unsigned long) host;
host->id = pdev->id;
+ host->mem_res = r;
+ host->irq = irq;
if (cpu_is_omap24xx()) {
host->iclk = clk_get(&pdev->dev, "mmc_ick");
host->dma_ch = -1;
host->irq = pdev->resource[1].start;
- host->base = ioremap(pdev->res.start, SZ_4K);
- if (!host->base) {
- ret = -ENOMEM;
- goto out;
- }
-
- if (minfo->wire4)
- mmc->caps |= MMC_CAP_4_BIT_DATA;
+ host->phys_base = host->mem_res->start;
+ host->virt_base = (void __iomem *) IO_ADDRESS(host->phys_base);
mmc->ops = &mmc_omap_ops;
mmc->f_min = 400000;
mmc->f_max = 24000000;
mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
+ mmc->caps = MMC_CAP_BYTEBLOCK;
+
+ if (minfo->wire4)
+ mmc->caps |= MMC_CAP_4_BIT_DATA;
/* Use scatterlist DMA to reduce per-transfer costs.
* NOTE max_seg_size assumption that small blocks aren't
if (host->power_pin >= 0) {
if ((ret = omap_request_gpio(host->power_pin)) != 0) {
- dev_err(mmc_dev(host->mmc), "Unable to get GPIO
- pin for MMC power\n");
+ dev_err(mmc_dev(host->mmc),
+ "Unable to get GPIO pin for MMC power\n");
goto out;
}
omap_set_gpio_direction(host->power_pin, 0);
omap_set_gpio_direction(host->switch_pin, 1);
ret = request_irq(OMAP_GPIO_IRQ(host->switch_pin),
- mmc_omap_switch_irq, SA_TRIGGER_RISING, DRIVER_NAME, host);
+ mmc_omap_switch_irq, IRQF_TRIGGER_RISING, DRIVER_NAME, host);
if (ret) {
dev_warn(mmc_dev(host->mmc), "Unable to get IRQ for MMC cover switch\n");
omap_free_gpio(host->switch_pin);
device_remove_file(&pdev->dev, &dev_attr_cover_switch);
}
if (ret) {
- dev_wan(mmc_dev(host->mmc), "Unable to create sysfs attributes\n");
+ dev_warn(mmc_dev(host->mmc), "Unable to create sysfs attributes\n");
free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
omap_free_gpio(host->switch_pin);
host->switch_pin = -1;
projects / linux-2.6-omap-h63xx.git / blobdiff