Merge branch 'next-s3c64xx-regs' of git://aeryn.fluff.org.uk/bjdooks/linux into devel

[linux-2.6-omap-h63xx.git] / drivers / mtd / nand / pxa3xx_nand.c

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index fc41444956108fd007fa818b3f80e658a718d3a6..61b69cc4000956cee468f116653bc5766fa1037f 100644 (file)
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -22,7 +22,6 @@
 #include <linux/irq.h>
 
 #include <mach/dma.h>
-#include <mach/pxa-regs.h>
 #include <mach/pxa3xx_nand.h>
 
 #define        CHIP_DELAY_TIMEOUT      (2 * HZ/10)
@@ -298,7 +297,7 @@ static struct pxa3xx_nand_flash *builtin_flash_types[] = {
 #define NDTR1_tAR(c)   (min((c), 15) << 0)
 
 /* convert nano-seconds to nand flash controller clock cycles */
-#define ns2cycle(ns, clk)      (int)(((ns) * (clk / 1000000) / 1000) + 1)
+#define ns2cycle(ns, clk)      (int)(((ns) * (clk / 1000000) / 1000) - 1)
 
 static void pxa3xx_nand_set_timing(struct pxa3xx_nand_info *info,
                                   const struct pxa3xx_nand_timing *t)
@@ -368,14 +367,14 @@ static int prepare_read_prog_cmd(struct pxa3xx_nand_info *info,
                /* large block, 2 cycles for column address
                 * row address starts from 3rd cycle
                 */
-               info->ndcb1 |= (page_addr << 16) | (column & 0xffff);
+               info->ndcb1 |= page_addr << 16;
                if (info->row_addr_cycles == 3)
                        info->ndcb2 = (page_addr >> 16) & 0xff;
        } else
                /* small block, 1 cycles for column address
                 * row address starts from 2nd cycle
                 */
-               info->ndcb1 = (page_addr << 8) | (column & 0xff);
+               info->ndcb1 = page_addr << 8;
 
        if (cmd == cmdset->program)
                info->ndcb0 |= NDCB0_CMD_TYPE(1) | NDCB0_AUTO_RS;