bnx2: Allow phy reset to be skipped during chip reset.

[linux-2.6-omap-h63xx.git] / drivers / net / bnx2.c

diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 8b552c6dd2e7b053248eff254abc103cbef38e87..934c2bfc464dd85b1e8f7db27cdd964fd2981ed9 100644 (file)
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -56,15 +56,15 @@
 
 #define DRV_MODULE_NAME                "bnx2"
 #define PFX DRV_MODULE_NAME    ": "
-#define DRV_MODULE_VERSION     "1.7.3"
-#define DRV_MODULE_RELDATE     "January 29, 2008"
+#define DRV_MODULE_VERSION     "1.7.5"
+#define DRV_MODULE_RELDATE     "April 29, 2008"
 
 #define RUN_AT(x) (jiffies + (x))
 
 /* Time in jiffies before concluding the transmitter is hung. */
 #define TX_TIMEOUT  (5*HZ)
 
-static const char version[] __devinitdata =
+static char version[] __devinitdata =
        "Broadcom NetXtreme II Gigabit Ethernet Driver " DRV_MODULE_NAME " v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
 
 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com>");
@@ -90,7 +90,7 @@ typedef enum {
 } board_t;
 
 /* indexed by board_t, above */
-static const struct {
+static struct {
        char *name;
 } board_info[] __devinitdata = {
        { "Broadcom NetXtreme II BCM5706 1000Base-T" },
@@ -1273,14 +1273,20 @@ bnx2_set_link(struct bnx2 *bp)
 
        if ((bp->phy_flags & BNX2_PHY_FLAG_SERDES) &&
            (CHIP_NUM(bp) == CHIP_NUM_5706)) {
-               u32 val;
+               u32 val, an_dbg;
 
                if (bp->phy_flags & BNX2_PHY_FLAG_FORCED_DOWN) {
                        bnx2_5706s_force_link_dn(bp, 0);
                        bp->phy_flags &= ~BNX2_PHY_FLAG_FORCED_DOWN;
                }
                val = REG_RD(bp, BNX2_EMAC_STATUS);
-               if (val & BNX2_EMAC_STATUS_LINK)
+
+               bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_AN_DBG);
+               bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &an_dbg);
+               bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &an_dbg);
+
+               if ((val & BNX2_EMAC_STATUS_LINK) &&
+                   !(an_dbg & MISC_SHDW_AN_DBG_NOSYNC))
                        bmsr |= BMSR_LSTATUS;
                else
                        bmsr &= ~BMSR_LSTATUS;
@@ -1625,8 +1631,10 @@ bnx2_set_default_remote_link(struct bnx2 *bp)
 static void
 bnx2_set_default_link(struct bnx2 *bp)
 {
-       if (bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP)
-               return bnx2_set_default_remote_link(bp);
+       if (bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP) {
+               bnx2_set_default_remote_link(bp);
+               return;
+       }
 
        bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL;
        bp->req_line_speed = 0;
@@ -1709,7 +1717,6 @@ bnx2_remote_phy_event(struct bnx2 *bp)
                                break;
                }
 
-               spin_lock(&bp->phy_lock);
                bp->flow_ctrl = 0;
                if ((bp->autoneg & (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) !=
                    (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) {
@@ -1731,7 +1738,6 @@ bnx2_remote_phy_event(struct bnx2 *bp)
                if (old_port != bp->phy_port)
                        bnx2_set_default_link(bp);
 
-               spin_unlock(&bp->phy_lock);
        }
        if (bp->link_up != link_up)
                bnx2_report_link(bp);
@@ -1869,7 +1875,7 @@ bnx2_setup_phy(struct bnx2 *bp, u8 port)
 }
 
 static int
-bnx2_init_5709s_phy(struct bnx2 *bp)
+bnx2_init_5709s_phy(struct bnx2 *bp, int reset_phy)
 {
        u32 val;
 
@@ -1884,7 +1890,8 @@ bnx2_init_5709s_phy(struct bnx2 *bp)
        bnx2_write_phy(bp, MII_BNX2_AER_AER, MII_BNX2_AER_AER_AN_MMD);
 
        bnx2_write_phy(bp, MII_BNX2_BLK_ADDR, MII_BNX2_BLK_ADDR_COMBO_IEEEB0);
-       bnx2_reset_phy(bp);
+       if (reset_phy)
+               bnx2_reset_phy(bp);
 
        bnx2_write_phy(bp, MII_BNX2_BLK_ADDR, MII_BNX2_BLK_ADDR_SERDES_DIG);
 
@@ -1918,11 +1925,12 @@ bnx2_init_5709s_phy(struct bnx2 *bp)
 }
 
 static int
-bnx2_init_5708s_phy(struct bnx2 *bp)
+bnx2_init_5708s_phy(struct bnx2 *bp, int reset_phy)
 {
        u32 val;
 
-       bnx2_reset_phy(bp);
+       if (reset_phy)
+               bnx2_reset_phy(bp);
 
        bp->mii_up1 = BCM5708S_UP1;
 
@@ -1975,9 +1983,10 @@ bnx2_init_5708s_phy(struct bnx2 *bp)
 }
 
 static int
-bnx2_init_5706s_phy(struct bnx2 *bp)
+bnx2_init_5706s_phy(struct bnx2 *bp, int reset_phy)
 {
-       bnx2_reset_phy(bp);
+       if (reset_phy)
+               bnx2_reset_phy(bp);
 
        bp->phy_flags &= ~BNX2_PHY_FLAG_PARALLEL_DETECT;
 
@@ -2012,11 +2021,12 @@ bnx2_init_5706s_phy(struct bnx2 *bp)
 }
 
 static int
-bnx2_init_copper_phy(struct bnx2 *bp)
+bnx2_init_copper_phy(struct bnx2 *bp, int reset_phy)
 {
        u32 val;
 
-       bnx2_reset_phy(bp);
+       if (reset_phy)
+               bnx2_reset_phy(bp);
 
        if (bp->phy_flags & BNX2_PHY_FLAG_CRC_FIX) {
                bnx2_write_phy(bp, 0x18, 0x0c00);
@@ -2064,7 +2074,7 @@ bnx2_init_copper_phy(struct bnx2 *bp)
 
 
 static int
-bnx2_init_phy(struct bnx2 *bp)
+bnx2_init_phy(struct bnx2 *bp, int reset_phy)
 {
        u32 val;
        int rc = 0;
@@ -2090,14 +2100,14 @@ bnx2_init_phy(struct bnx2 *bp)
 
        if (bp->phy_flags & BNX2_PHY_FLAG_SERDES) {
                if (CHIP_NUM(bp) == CHIP_NUM_5706)
-                       rc = bnx2_init_5706s_phy(bp);
+                       rc = bnx2_init_5706s_phy(bp, reset_phy);
                else if (CHIP_NUM(bp) == CHIP_NUM_5708)
-                       rc = bnx2_init_5708s_phy(bp);
+                       rc = bnx2_init_5708s_phy(bp, reset_phy);
                else if (CHIP_NUM(bp) == CHIP_NUM_5709)
-                       rc = bnx2_init_5709s_phy(bp);
+                       rc = bnx2_init_5709s_phy(bp, reset_phy);
        }
        else {
-               rc = bnx2_init_copper_phy(bp);
+               rc = bnx2_init_copper_phy(bp, reset_phy);
        }
 
 setup_phy:
@@ -2216,6 +2226,11 @@ bnx2_init_5709_context(struct bnx2 *bp)
        for (i = 0; i < bp->ctx_pages; i++) {
                int j;
 
+               if (bp->ctx_blk[i])
+                       memset(bp->ctx_blk[i], 0, BCM_PAGE_SIZE);
+               else
+                       return -ENOMEM;
+
                REG_WR(bp, BNX2_CTX_HOST_PAGE_TBL_DATA0,
                       (bp->ctx_blk_mapping[i] & 0xffffffff) |
                       BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID);
@@ -2439,14 +2454,15 @@ bnx2_phy_event_is_set(struct bnx2 *bp, struct bnx2_napi *bnapi, u32 event)
 static void
 bnx2_phy_int(struct bnx2 *bp, struct bnx2_napi *bnapi)
 {
-       if (bnx2_phy_event_is_set(bp, bnapi, STATUS_ATTN_BITS_LINK_STATE)) {
-               spin_lock(&bp->phy_lock);
+       spin_lock(&bp->phy_lock);
+
+       if (bnx2_phy_event_is_set(bp, bnapi, STATUS_ATTN_BITS_LINK_STATE))
                bnx2_set_link(bp);
-               spin_unlock(&bp->phy_lock);
-       }
        if (bnx2_phy_event_is_set(bp, bnapi, STATUS_ATTN_BITS_TIMER_ABORT))
                bnx2_set_remote_link(bp);
 
+       spin_unlock(&bp->phy_lock);
+
 }
 
 static inline u16
@@ -3168,6 +3184,12 @@ load_rv2p_fw(struct bnx2 *bp, __le32 *rv2p_code, u32 rv2p_code_len,
        int i;
        u32 val;
 
+       if (rv2p_proc == RV2P_PROC2 && CHIP_NUM(bp) == CHIP_NUM_5709) {
+               val = le32_to_cpu(rv2p_code[XI_RV2P_PROC2_MAX_BD_PAGE_LOC]);
+               val &= ~XI_RV2P_PROC2_BD_PAGE_SIZE_MSK;
+               val |= XI_RV2P_PROC2_BD_PAGE_SIZE;
+               rv2p_code[XI_RV2P_PROC2_MAX_BD_PAGE_LOC] = cpu_to_le32(val);
+       }
 
        for (i = 0; i < rv2p_code_len; i += 8) {
                REG_WR(bp, BNX2_RV2P_INSTR_HIGH, le32_to_cpu(*rv2p_code));
@@ -4209,13 +4231,6 @@ bnx2_init_remote_phy(struct bnx2 *bp)
                if (netif_running(bp->dev)) {
                        u32 sig;
 
-                       if (val & BNX2_LINK_STATUS_LINK_UP) {
-                               bp->link_up = 1;
-                               netif_carrier_on(bp->dev);
-                       } else {
-                               bp->link_up = 0;
-                               netif_carrier_off(bp->dev);
-                       }
                        sig = BNX2_DRV_ACK_CAP_SIGNATURE |
                              BNX2_FW_CAP_REMOTE_PHY_CAPABLE;
                        bnx2_shmem_wr(bp, BNX2_DRV_ACK_CAP_MB, sig);
@@ -4862,7 +4877,7 @@ bnx2_reset_nic(struct bnx2 *bp, u32 reset_code)
 }
 
 static int
-bnx2_init_nic(struct bnx2 *bp)
+bnx2_init_nic(struct bnx2 *bp, int reset_phy)
 {
        int rc;
 
@@ -4870,8 +4885,10 @@ bnx2_init_nic(struct bnx2 *bp)
                return rc;
 
        spin_lock_bh(&bp->phy_lock);
-       bnx2_init_phy(bp);
+       bnx2_init_phy(bp, reset_phy);
        bnx2_set_link(bp);
+       if (bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP)
+               bnx2_remote_phy_event(bp);
        spin_unlock_bh(&bp->phy_lock);
        return 0;
 }
@@ -4914,7 +4931,7 @@ bnx2_test_registers(struct bnx2 *bp)
                { 0x0c08, BNX2_FL_NOT_5709,  0x0f0ff073, 0x00000000 },
 
                { 0x1000, 0, 0x00000000, 0x00000001 },
-               { 0x1004, 0, 0x00000000, 0x000f0001 },
+               { 0x1004, BNX2_FL_NOT_5709, 0x00000000, 0x000f0001 },
 
                { 0x1408, 0, 0x01c00800, 0x00000000 },
                { 0x149c, 0, 0x8000ffff, 0x00000000 },
@@ -5256,7 +5273,7 @@ bnx2_test_loopback(struct bnx2 *bp)
 
        bnx2_reset_nic(bp, BNX2_DRV_MSG_CODE_RESET);
        spin_lock_bh(&bp->phy_lock);
-       bnx2_init_phy(bp);
+       bnx2_init_phy(bp, 1);
        spin_unlock_bh(&bp->phy_lock);
        if (bnx2_run_loopback(bp, BNX2_MAC_LOOPBACK))
                rc |= BNX2_MAC_LOOPBACK_FAILED;
@@ -5356,11 +5373,15 @@ bnx2_test_intr(struct bnx2 *bp)
        return -ENODEV;
 }
 
+/* Determining link for parallel detection. */
 static int
 bnx2_5706_serdes_has_link(struct bnx2 *bp)
 {
        u32 mode_ctl, an_dbg, exp;
 
+       if (bp->phy_flags & BNX2_PHY_FLAG_NO_PARALLEL)
+               return 0;
+
        bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_MODE_CTL);
        bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &mode_ctl);
 
@@ -5390,13 +5411,6 @@ bnx2_5706_serdes_timer(struct bnx2 *bp)
        int check_link = 1;
 
        spin_lock(&bp->phy_lock);
-       if (bp->phy_flags & BNX2_PHY_FLAG_FORCED_DOWN) {
-               bnx2_5706s_force_link_dn(bp, 0);
-               bp->phy_flags &= ~BNX2_PHY_FLAG_FORCED_DOWN;
-               spin_unlock(&bp->phy_lock);
-               return;
-       }
-
        if (bp->serdes_an_pending) {
                bp->serdes_an_pending--;
                check_link = 0;
@@ -5420,7 +5434,6 @@ bnx2_5706_serdes_timer(struct bnx2 *bp)
                 (bp->phy_flags & BNX2_PHY_FLAG_PARALLEL_DETECT)) {
                u32 phy2;
 
-               check_link = 0;
                bnx2_write_phy(bp, 0x17, 0x0f01);
                bnx2_read_phy(bp, 0x15, &phy2);
                if (phy2 & 0x20) {
@@ -5435,17 +5448,21 @@ bnx2_5706_serdes_timer(struct bnx2 *bp)
        } else
                bp->current_interval = bp->timer_interval;
 
-       if (bp->link_up && (bp->autoneg & AUTONEG_SPEED) && check_link) {
+       if (check_link) {
                u32 val;
 
                bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_AN_DBG);
                bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &val);
                bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &val);
 
-               if (val & MISC_SHDW_AN_DBG_NOSYNC) {
-                       bnx2_5706s_force_link_dn(bp, 1);
-                       bp->phy_flags |= BNX2_PHY_FLAG_FORCED_DOWN;
-               }
+               if (bp->link_up && (val & MISC_SHDW_AN_DBG_NOSYNC)) {
+                       if (!(bp->phy_flags & BNX2_PHY_FLAG_FORCED_DOWN)) {
+                               bnx2_5706s_force_link_dn(bp, 1);
+                               bp->phy_flags |= BNX2_PHY_FLAG_FORCED_DOWN;
+                       } else
+                               bnx2_set_link(bp);
+               } else if (!bp->link_up && !(val & MISC_SHDW_AN_DBG_NOSYNC))
+                       bnx2_set_link(bp);
        }
        spin_unlock(&bp->phy_lock);
 }
@@ -5646,7 +5663,7 @@ bnx2_open(struct net_device *dev)
                return rc;
        }
 
-       rc = bnx2_init_nic(bp);
+       rc = bnx2_init_nic(bp, 1);
 
        if (rc) {
                bnx2_napi_disable(bp);
@@ -5678,7 +5695,7 @@ bnx2_open(struct net_device *dev)
 
                        bnx2_setup_int_mode(bp, 1);
 
-                       rc = bnx2_init_nic(bp);
+                       rc = bnx2_init_nic(bp, 0);
 
                        if (!rc)
                                rc = bnx2_request_irq(bp);
@@ -5714,7 +5731,7 @@ bnx2_reset_task(struct work_struct *work)
        bp->in_reset_task = 1;
        bnx2_netif_stop(bp);
 
-       bnx2_init_nic(bp);
+       bnx2_init_nic(bp, 1);
 
        atomic_set(&bp->intr_sem, 1);
        bnx2_netif_start(bp);
@@ -6408,7 +6425,7 @@ bnx2_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal)
 
        if (netif_running(bp->dev)) {
                bnx2_netif_stop(bp);
-               bnx2_init_nic(bp);
+               bnx2_init_nic(bp, 0);
                bnx2_netif_start(bp);
        }
 
@@ -6451,7 +6468,7 @@ bnx2_change_ring_size(struct bnx2 *bp, u32 rx, u32 tx)
                rc = bnx2_alloc_mem(bp);
                if (rc)
                        return rc;
-               bnx2_init_nic(bp);
+               bnx2_init_nic(bp, 0);
                bnx2_netif_start(bp);
        }
        return 0;
@@ -6719,7 +6736,7 @@ bnx2_self_test(struct net_device *dev, struct ethtool_test *etest, u64 *buf)
                        bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_RESET);
                }
                else {
-                       bnx2_init_nic(bp);
+                       bnx2_init_nic(bp, 1);
                        bnx2_netif_start(bp);
                }
 
@@ -7326,7 +7343,15 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
                        bp->flags |= BNX2_FLAG_NO_WOL;
                        bp->wol = 0;
                }
-               if (CHIP_NUM(bp) != CHIP_NUM_5706) {
+               if (CHIP_NUM(bp) == CHIP_NUM_5706) {
+                       /* Don't do parallel detect on this board because of
+                        * some board problems.  The link will not go down
+                        * if we do parallel detect.
+                        */
+                       if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
+                           pdev->subsystem_device == 0x310c)
+                               bp->phy_flags |= BNX2_PHY_FLAG_NO_PARALLEL;
+               } else {
                        bp->phy_addr = 2;
                        if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)
                                bp->phy_flags |= BNX2_PHY_FLAG_2_5G_CAPABLE;
@@ -7598,7 +7623,7 @@ bnx2_resume(struct pci_dev *pdev)
 
        bnx2_set_power_state(bp, PCI_D0);
        netif_device_attach(dev);
-       bnx2_init_nic(bp);
+       bnx2_init_nic(bp, 1);
        bnx2_netif_start(bp);
        return 0;
 }