} e1000_fc_type;
struct e1000_shadow_ram {
- uint16_t eeprom_word;
- boolean_t modified;
+ uint16_t eeprom_word;
+ bool modified;
};
/* PCI bus types */
uint16_t address_bits;
uint16_t delay_usec;
uint16_t page_size;
- boolean_t use_eerd;
- boolean_t use_eewr;
+ bool use_eerd;
+ bool use_eewr;
};
/* Flex ASF Information */
int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer,
uint16_t length);
-boolean_t e1000_check_mng_mode(struct e1000_hw *hw);
-boolean_t e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
+bool e1000_check_mng_mode(struct e1000_hw *hw);
+bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data);
int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw);
int32_t e1000_update_eeprom_checksum(struct e1000_hw *hw);
void e1000_get_bus_info(struct e1000_hw *hw);
void e1000_pci_set_mwi(struct e1000_hw *hw);
void e1000_pci_clear_mwi(struct e1000_hw *hw);
-void e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value);
-void e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t * value);
int32_t e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value);
+void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc);
+int e1000_pcix_get_mmrbc(struct e1000_hw *hw);
/* Port I/O is only supported on 82544 and newer */
void e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value);
int32_t e1000_disable_pciex_master(struct e1000_hw *hw);
/* Receive Descriptor */
struct e1000_rx_desc {
- uint64_t buffer_addr; /* Address of the descriptor's data buffer */
- uint16_t length; /* Length of data DMAed into data buffer */
- uint16_t csum; /* Packet checksum */
+ __le64 buffer_addr; /* Address of the descriptor's data buffer */
+ __le16 length; /* Length of data DMAed into data buffer */
+ __le16 csum; /* Packet checksum */
uint8_t status; /* Descriptor status */
uint8_t errors; /* Descriptor Errors */
- uint16_t special;
+ __le16 special;
};
/* Receive Descriptor - Extended */
union e1000_rx_desc_extended {
struct {
- uint64_t buffer_addr;
- uint64_t reserved;
+ __le64 buffer_addr;
+ __le64 reserved;
} read;
struct {
struct {
- uint32_t mrq; /* Multiple Rx Queues */
+ __le32 mrq; /* Multiple Rx Queues */
union {
- uint32_t rss; /* RSS Hash */
+ __le32 rss; /* RSS Hash */
struct {
- uint16_t ip_id; /* IP id */
- uint16_t csum; /* Packet Checksum */
+ __le16 ip_id; /* IP id */
+ __le16 csum; /* Packet Checksum */
} csum_ip;
} hi_dword;
} lower;
struct {
- uint32_t status_error; /* ext status/error */
- uint16_t length;
- uint16_t vlan; /* VLAN tag */
+ __le32 status_error; /* ext status/error */
+ __le16 length;
+ __le16 vlan; /* VLAN tag */
} upper;
} wb; /* writeback */
};
union e1000_rx_desc_packet_split {
struct {
/* one buffer for protocol header(s), three data buffers */
- uint64_t buffer_addr[MAX_PS_BUFFERS];
+ __le64 buffer_addr[MAX_PS_BUFFERS];
} read;
struct {
struct {
- uint32_t mrq; /* Multiple Rx Queues */
+ __le32 mrq; /* Multiple Rx Queues */
union {
- uint32_t rss; /* RSS Hash */
+ __le32 rss; /* RSS Hash */
struct {
- uint16_t ip_id; /* IP id */
- uint16_t csum; /* Packet Checksum */
+ __le16 ip_id; /* IP id */
+ __le16 csum; /* Packet Checksum */
} csum_ip;
} hi_dword;
} lower;
struct {
- uint32_t status_error; /* ext status/error */
- uint16_t length0; /* length of buffer 0 */
- uint16_t vlan; /* VLAN tag */
+ __le32 status_error; /* ext status/error */
+ __le16 length0; /* length of buffer 0 */
+ __le16 vlan; /* VLAN tag */
} middle;
struct {
- uint16_t header_status;
- uint16_t length[3]; /* length of buffers 1-3 */
+ __le16 header_status;
+ __le16 length[3]; /* length of buffers 1-3 */
} upper;
- uint64_t reserved;
+ __le64 reserved;
} wb; /* writeback */
};
/* Transmit Descriptor */
struct e1000_tx_desc {
- uint64_t buffer_addr; /* Address of the descriptor's data buffer */
+ __le64 buffer_addr; /* Address of the descriptor's data buffer */
union {
- uint32_t data;
+ __le32 data;
struct {
- uint16_t length; /* Data buffer length */
+ __le16 length; /* Data buffer length */
uint8_t cso; /* Checksum offset */
uint8_t cmd; /* Descriptor control */
} flags;
} lower;
union {
- uint32_t data;
+ __le32 data;
struct {
uint8_t status; /* Descriptor status */
uint8_t css; /* Checksum start */
- uint16_t special;
+ __le16 special;
} fields;
} upper;
};
/* Offload Context Descriptor */
struct e1000_context_desc {
union {
- uint32_t ip_config;
+ __le32 ip_config;
struct {
uint8_t ipcss; /* IP checksum start */
uint8_t ipcso; /* IP checksum offset */
- uint16_t ipcse; /* IP checksum end */
+ __le16 ipcse; /* IP checksum end */
} ip_fields;
} lower_setup;
union {
- uint32_t tcp_config;
+ __le32 tcp_config;
struct {
uint8_t tucss; /* TCP checksum start */
uint8_t tucso; /* TCP checksum offset */
- uint16_t tucse; /* TCP checksum end */
+ __le16 tucse; /* TCP checksum end */
} tcp_fields;
} upper_setup;
- uint32_t cmd_and_length; /* */
+ __le32 cmd_and_length; /* */
union {
- uint32_t data;
+ __le32 data;
struct {
uint8_t status; /* Descriptor status */
uint8_t hdr_len; /* Header length */
- uint16_t mss; /* Maximum segment size */
+ __le16 mss; /* Maximum segment size */
} fields;
} tcp_seg_setup;
};
/* Offload data descriptor */
struct e1000_data_desc {
- uint64_t buffer_addr; /* Address of the descriptor's buffer address */
+ __le64 buffer_addr; /* Address of the descriptor's buffer address */
union {
- uint32_t data;
+ __le32 data;
struct {
- uint16_t length; /* Data buffer length */
+ __le16 length; /* Data buffer length */
uint8_t typ_len_ext; /* */
uint8_t cmd; /* */
} flags;
} lower;
union {
- uint32_t data;
+ __le32 data;
struct {
uint8_t status; /* Descriptor status */
uint8_t popts; /* Packet Options */
- uint16_t special; /* */
+ __le16 special; /* */
} fields;
} upper;
};
/* Receive Address Register */
struct e1000_rar {
- volatile uint32_t low; /* receive address low */
- volatile uint32_t high; /* receive address high */
+ volatile __le32 low; /* receive address low */
+ volatile __le32 high; /* receive address high */
};
/* Number of entries in the Multicast Table Array (MTA). */
uint32_t ledctl_default;
uint32_t ledctl_mode1;
uint32_t ledctl_mode2;
- boolean_t tx_pkt_filtering;
+ bool tx_pkt_filtering;
struct e1000_host_mng_dhcp_cookie mng_cookie;
uint16_t phy_spd_default;
uint16_t autoneg_advertised;
uint8_t dma_fairness;
uint8_t mac_addr[NODE_ADDRESS_SIZE];
uint8_t perm_mac_addr[NODE_ADDRESS_SIZE];
- boolean_t disable_polarity_correction;
- boolean_t speed_downgraded;
+ bool disable_polarity_correction;
+ bool speed_downgraded;
e1000_smart_speed smart_speed;
e1000_dsp_config dsp_config_state;
- boolean_t get_link_status;
- boolean_t serdes_link_down;
- boolean_t tbi_compatibility_en;
- boolean_t tbi_compatibility_on;
- boolean_t laa_is_present;
- boolean_t phy_reset_disable;
- boolean_t initialize_hw_bits_disable;
- boolean_t fc_send_xon;
- boolean_t fc_strict_ieee;
- boolean_t report_tx_early;
- boolean_t adaptive_ifs;
- boolean_t ifs_params_forced;
- boolean_t in_ifs_mode;
- boolean_t mng_reg_access_disabled;
- boolean_t leave_av_bit_off;
- boolean_t kmrn_lock_loss_workaround_disabled;
- boolean_t bad_tx_carr_stats_fd;
- boolean_t has_manc2h;
- boolean_t rx_needs_kicking;
- boolean_t has_smbus;
+ bool get_link_status;
+ bool serdes_link_down;
+ bool tbi_compatibility_en;
+ bool tbi_compatibility_on;
+ bool laa_is_present;
+ bool phy_reset_disable;
+ bool initialize_hw_bits_disable;
+ bool fc_send_xon;
+ bool fc_strict_ieee;
+ bool report_tx_early;
+ bool adaptive_ifs;
+ bool ifs_params_forced;
+ bool in_ifs_mode;
+ bool mng_reg_access_disabled;
+ bool leave_av_bit_off;
+ bool kmrn_lock_loss_workaround_disabled;
+ bool bad_tx_carr_stats_fd;
+ bool has_manc2h;
+ bool rx_needs_kicking;
+ bool has_smbus;
};
* Typical use:
* ...
* if (TBI_ACCEPT) {
- * accept_frame = TRUE;
+ * accept_frame = true;
* e1000_tbi_adjust_stats(adapter, MacAddress);
* frame_length--;
* } else {
- * accept_frame = FALSE;
+ * accept_frame = false;
* }
* ...
*/
projects / linux-2.6-omap-h63xx.git / blobdiff