s2io_chk_rx_buffers(nic, ring);
if (pkts_processed < budget_org) {
- netif_rx_complete(dev, napi);
+ netif_rx_complete(napi);
/*Re Enable MSI-Rx Vector*/
addr = (u8 __iomem *)&bar0->xmsi_mask_reg;
addr += 7 - ring->ring_no;
{
struct s2io_nic *nic = container_of(napi, struct s2io_nic, napi);
struct ring_info *ring;
- struct net_device *dev = nic->dev;
struct config_param *config;
struct mac_info *mac_control;
int pkts_processed = 0;
break;
}
if (pkts_processed < budget_org) {
- netif_rx_complete(dev, napi);
+ netif_rx_complete(napi);
/* Re enable the Rx interrupts for the ring */
writeq(0, &bar0->rx_traffic_mask);
readl(&bar0->rx_traffic_mask);
struct ring_info *ring = (struct ring_info *)dev_id;
struct s2io_nic *sp = ring->nic;
struct XENA_dev_config __iomem *bar0 = sp->bar0;
- struct net_device *dev = sp->dev;
if (unlikely(!is_s2io_card_up(sp)))
return IRQ_HANDLED;
val8 = (ring->ring_no == 0) ? 0x7f : 0xff;
writeb(val8, addr);
val8 = readb(addr);
- netif_rx_schedule(dev, &ring->napi);
+ netif_rx_schedule(&ring->napi);
} else {
rx_intr_handler(ring, 0);
s2io_chk_rx_buffers(sp, ring);
if (config->napi) {
if (reason & GEN_INTR_RXTRAFFIC) {
- netif_rx_schedule(dev, &sp->napi);
+ netif_rx_schedule(&sp->napi);
writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask);
writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
readl(&bar0->rx_traffic_int);
/* read from CAM unicast & multicast addresses and store it in
* def_mac_addr structure
*/
-void do_s2io_store_unicast_mc(struct s2io_nic *sp)
+static void do_s2io_store_unicast_mc(struct s2io_nic *sp)
{
int offset;
u64 mac_addr = 0x0;