]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/net/sky2.h
[SCSI] lpfc: Balance locking
[linux-2.6-omap-h63xx.git] / drivers / net / sky2.h
index bc646a47edd2f04b83a78a5b40da085a90915192..5ab5c1c7c5aa76ed30d8c6850b09192afac5d6db 100644 (file)
@@ -425,12 +425,13 @@ enum {
 
 /*     B2_CHIP_ID               8 bit  Chip Identification Number */
 enum {
-       CHIP_ID_YUKON_XL   = 0xb3, /* Chip ID for YUKON-2 XL */
-       CHIP_ID_YUKON_EC_U = 0xb4, /* Chip ID for YUKON-2 EC Ultra */
-       CHIP_ID_YUKON_EX   = 0xb5, /* Chip ID for YUKON-2 Extreme */
-       CHIP_ID_YUKON_EC   = 0xb6, /* Chip ID for YUKON-2 EC */
-       CHIP_ID_YUKON_FE   = 0xb7, /* Chip ID for YUKON-2 FE */
-       CHIP_ID_YUKON_FE_P = 0xb8, /* Chip ID for YUKON-2 FE+ */
+       CHIP_ID_YUKON_XL   = 0xb3, /* YUKON-2 XL */
+       CHIP_ID_YUKON_EC_U = 0xb4, /* YUKON-2 EC Ultra */
+       CHIP_ID_YUKON_EX   = 0xb5, /* YUKON-2 Extreme */
+       CHIP_ID_YUKON_EC   = 0xb6, /* YUKON-2 EC */
+       CHIP_ID_YUKON_FE   = 0xb7, /* YUKON-2 FE */
+       CHIP_ID_YUKON_FE_P = 0xb8, /* YUKON-2 FE+ */
+       CHIP_ID_YUKON_SUPR = 0xb9, /* YUKON-2 Supreme */
 };
 enum yukon_ec_rev {
        CHIP_REV_YU_EC_A1    = 0,  /* Chip Rev. for Yukon-EC A1/A0 */
@@ -1991,14 +1992,14 @@ struct sky2_port {
        u16                  tx_cons;           /* next le to check */
        u16                  tx_prod;           /* next le to use */
        u16                  tx_next;           /* debug only */
-       u32                  tx_addr64;
+
        u16                  tx_pending;
        u16                  tx_last_mss;
        u32                  tx_tcpsum;
 
        struct rx_ring_info  *rx_ring ____cacheline_aligned_in_smp;
        struct sky2_rx_le    *rx_le;
-       u32                  rx_addr64;
+
        u16                  rx_next;           /* next re to check */
        u16                  rx_put;            /* next le index to use */
        u16                  rx_pending;
@@ -2044,7 +2045,7 @@ struct sky2_hw {
 #define SKY2_HW_FIBRE_PHY      0x00000002
 #define SKY2_HW_GIGABIT                0x00000004
 #define SKY2_HW_NEWER_PHY      0x00000008
-#define SKY2_HW_FIFO_HANG_CHECK        0x00000010
+#define SKY2_HW_RAM_BUFFER     0x00000010
 #define SKY2_HW_NEW_LE         0x00000020      /* new LSOv2 format */
 #define SKY2_HW_AUTO_TX_SUM    0x00000040      /* new IP decode for Tx */
 #define SKY2_HW_ADV_POWER_CTL  0x00000080      /* additional PHY power regs */