]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/net/tg3.h
Merge branch 'master'
[linux-2.6-omap-h63xx.git] / drivers / net / tg3.h
index c184b773e58543be34027d65810b7fdb2f4f1539..fb7e2a5f4a088baa0c683f36dfeca1aaf7ff8517 100644 (file)
 #define   ASIC_REV_5750                         0x04
 #define   ASIC_REV_5752                         0x06
 #define   ASIC_REV_5780                         0x08
+#define   ASIC_REV_5714                         0x09
 #define  GET_CHIP_REV(CHIP_REV_ID)     ((CHIP_REV_ID) >> 8)
 #define   CHIPREV_5700_AX               0x70
 #define   CHIPREV_5700_BX               0x71
 #define  MAC_SERDES_CFG_EDGE_SELECT     0x00001000
 #define MAC_SERDES_STAT                        0x00000594
 /* 0x598 --> 0x5b0 unused */
+#define SERDES_RX_CTRL                 0x000005b0      /* 5780/5714 only */
+#define  SERDES_RX_SIG_DETECT           0x00000400
 #define SG_DIG_CTRL                    0x000005b0
 #define  SG_DIG_USING_HW_AUTONEG        0x80000000
 #define  SG_DIG_SOFT_RESET              0x40000000
 #define  GRC_LCLCTRL_CLEARINT          0x00000002
 #define  GRC_LCLCTRL_SETINT            0x00000004
 #define  GRC_LCLCTRL_INT_ON_ATTN       0x00000008
+#define  GRC_LCLCTRL_USE_SIG_DETECT    0x00000010      /* 5714/5780 only */
+#define  GRC_LCLCTRL_USE_EXT_SIG_DETECT        0x00000020      /* 5714/5780 only */
 #define  GRC_LCLCTRL_GPIO_INPUT3       0x00000020
 #define  GRC_LCLCTRL_GPIO_OE3          0x00000040
 #define  GRC_LCLCTRL_GPIO_OUTPUT3      0x00000080
 #define  FWCMD_NICDRV_IPV6ADDR_CHG      0x00000004
 #define  FWCMD_NICDRV_FIX_DMAR          0x00000005
 #define  FWCMD_NICDRV_FIX_DMAW          0x00000006
+#define  FWCMD_NICDRV_ALIVE2            0x0000000d
 #define NIC_SRAM_FW_CMD_LEN_MBOX       0x00000b7c
 #define NIC_SRAM_FW_CMD_DATA_MBOX      0x00000b80
 #define NIC_SRAM_FW_ASF_STATUS_MBOX    0x00000c00
@@ -2175,6 +2181,7 @@ struct tg3 {
                                        TG3_FLG2_MII_SERDES)
 #define TG3_FLG2_PARALLEL_DETECT       0x01000000
 #define TG3_FLG2_ICH_WORKAROUND                0x02000000
+#define TG3_FLG2_5780_CLASS            0x04000000
 
        u32                             split_mode_max_reqs;
 #define SPLIT_MODE_5704_MAX_REQ                3
@@ -2222,6 +2229,7 @@ struct tg3 {
 #define PHY_ID_BCM5705                 0x600081a0
 #define PHY_ID_BCM5750                 0x60008180
 #define PHY_ID_BCM5752                 0x60008100
+#define PHY_ID_BCM5714                 0x60008340
 #define PHY_ID_BCM5780                 0x60008350
 #define PHY_ID_BCM8002                 0x60010140
 #define PHY_ID_INVALID                 0xffffffff
@@ -2246,7 +2254,8 @@ struct tg3 {
         (X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \
         (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
         (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
-        (X) == PHY_ID_BCM8002)
+        (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
+        (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM8002)
 
        struct tg3_hw_stats             *hw_stats;
        dma_addr_t                      stats_mapping;