module_param(tx_ring_size, uint, 0);
module_param(rx_ring_size, uint, 0);
-static const char version[] = KERN_INFO "adm8211: "
-"Copyright 2003, Jouni Malinen <j@w1.fi>; "
-"Copyright 2004-2007, Michael Wu <flamingice@sourmilk.net>\n";
-
-
static struct pci_device_id adm8211_pci_id_table[] __devinitdata = {
/* ADMtek ADM8211 */
{ PCI_DEVICE(0x10B7, 0x6000) }, /* 3Com 3CRSHPW796 */
if (!priv->eeprom)
return -ENOMEM;
- eeprom_93cx6_multiread(&eeprom, 0, (__le16 __force *)priv->eeprom, words);
+ eeprom_93cx6_multiread(&eeprom, 0, (__le16 *)priv->eeprom, words);
cr49 = le16_to_cpu(priv->eeprom->cr49);
priv->rf_type = (cr49 >> 3) & 0x7;
break;
default:
- if (priv->revid < ADM8211_REV_CA)
+ if (priv->pdev->revision < ADM8211_REV_CA)
priv->rf_type = ADM8211_TYPE_RFMD;
else
priv->rf_type = ADM8211_TYPE_AIROHA;
case ADM8211_TYPE_ADMTEK:
break;
default:
- if (priv->revid < ADM8211_REV_CA)
+ if (priv->pdev->revision < ADM8211_REV_CA)
priv->bbp_type = ADM8211_TYPE_RFMD;
else
priv->bbp_type = ADM8211_TYPE_ADMTEK;
break;
default:
- if (priv->revid < ADM8211_REV_CA)
+ if (priv->pdev->revision < ADM8211_REV_CA)
priv->specific_bbptype = ADM8211_BBP_RFMD3000;
else
priv->specific_bbptype = ADM8211_BBP_ADM8011;
break;
default:
- if (priv->revid == ADM8211_REV_BA)
+ if (priv->pdev->revision == ADM8211_REV_BA)
priv->transceiver_type = ADM8211_RFMD2958_RF3000_CONTROL_POWER;
- else if (priv->revid == ADM8211_REV_CA)
+ else if (priv->pdev->revision == ADM8211_REV_CA)
priv->transceiver_type = ADM8211_AL2210L;
- else if (priv->revid == ADM8211_REV_AB)
+ else if (priv->pdev->revision == ADM8211_REV_AB)
priv->transceiver_type = ADM8211_RFMD2948;
printk(KERN_WARNING "%s (adm8211): Unknown transceiver: %d\n",
struct adm8211_priv *priv = dev->priv;
ADM8211_CSR_WRITE(WEPCTL, addr | ADM8211_WEPCTL_TABLE_WR |
- (priv->revid < ADM8211_REV_BA ?
+ (priv->pdev->revision < ADM8211_REV_BA ?
0 : ADM8211_WEPCTL_SEL_WEPTABLE ));
ADM8211_CSR_READ(WEPCTL);
msleep(1);
u32 reg = ADM8211_CSR_READ(WEPCTL);
unsigned int i;
- if (priv->revid < ADM8211_REV_BA) {
+ if (priv->pdev->revision < ADM8211_REV_BA) {
for (i = 0; i < len; i += 2) {
u16 val = buf[i] | (buf[i + 1] << 8);
adm8211_write_sram(dev, addr + i / 2, val);
return 0;
}
-static void adm8211_set_rx_mode(struct ieee80211_hw *dev,
- unsigned short flags, int mc_count)
-{
- struct adm8211_priv *priv = dev->priv;
- unsigned int bit_nr;
- u32 mc_filter[2];
- struct dev_mc_list *mclist;
- void *tmp;
-
- if (flags & IFF_PROMISC) {
- priv->nar |= ADM8211_NAR_PR;
- priv->nar &= ~ADM8211_NAR_MM;
- mc_filter[1] = mc_filter[0] = ~0;
- } else if ((flags & IFF_ALLMULTI) || (mc_count > -1)) {
- priv->nar &= ~ADM8211_NAR_PR;
- priv->nar |= ADM8211_NAR_MM;
- mc_filter[1] = mc_filter[0] = ~0;
- } else {
- priv->nar &= ~(ADM8211_NAR_MM | ADM8211_NAR_PR);
- mc_filter[1] = mc_filter[0] = 0;
- mclist = NULL;
- while ((mclist = ieee80211_get_mc_list_item(dev, mclist, &tmp))) {
- bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
-
- bit_nr &= 0x3F;
- mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
- }
- }
-
- ADM8211_IDLE_RX();
-
- ADM8211_CSR_WRITE(MAR0, mc_filter[0]);
- ADM8211_CSR_WRITE(MAR1, mc_filter[1]);
- ADM8211_CSR_READ(NAR);
-
- if (flags & IFF_PROMISC)
- dev->flags |= IEEE80211_HW_RX_INCLUDES_FCS;
- else
- dev->flags &= ~IEEE80211_HW_RX_INCLUDES_FCS;
-
- ADM8211_RESTORE();
-}
-
static int adm8211_get_tx_stats(struct ieee80211_hw *dev,
struct ieee80211_tx_queue_stats *stats)
{
for (dirty_tx = priv->dirty_tx; priv->cur_tx - dirty_tx; dirty_tx++) {
unsigned int entry = dirty_tx % priv->tx_ring_size;
u32 status = le32_to_cpu(priv->tx_ring[entry].status);
+ struct ieee80211_tx_status tx_status;
struct adm8211_tx_ring_info *info;
struct sk_buff *skb;
pci_unmap_single(priv->pdev, info->mapping,
info->skb->len, PCI_DMA_TODEVICE);
- if (info->tx_control.flags & IEEE80211_TXCTL_REQ_TX_STATUS) {
- struct ieee80211_tx_status tx_status = {{0}};
- struct ieee80211_hdr *hdr;
- size_t hdrlen = info->hdrlen;
-
- skb_pull(skb, sizeof(struct adm8211_tx_hdr));
- hdr = (struct ieee80211_hdr *)skb_push(skb, hdrlen);
- memcpy(hdr, skb->cb, hdrlen);
- memcpy(&tx_status.control, &info->tx_control,
- sizeof(tx_status.control));
- if (!(status & TDES0_STATUS_ES))
+ memset(&tx_status, 0, sizeof(tx_status));
+ skb_pull(skb, sizeof(struct adm8211_tx_hdr));
+ memcpy(skb_push(skb, info->hdrlen), skb->cb, info->hdrlen);
+ memcpy(&tx_status.control, &info->tx_control,
+ sizeof(tx_status.control));
+ if (!(tx_status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
+ if (status & TDES0_STATUS_ES)
+ tx_status.excessive_retries = 1;
+ else
tx_status.flags |= IEEE80211_TX_STATUS_ACK;
- ieee80211_tx_status_irqsafe(dev, skb, &tx_status);
- } else
- dev_kfree_skb_irq(skb);
+ }
+ ieee80211_tx_status_irqsafe(dev, skb, &tx_status);
+
info->skb = NULL;
}
if (skb) {
struct ieee80211_rx_status rx_status = {0};
- if (priv->revid < ADM8211_REV_CA)
+ if (priv->pdev->revision < ADM8211_REV_CA)
rx_status.ssi = rssi;
else
rx_status.ssi = 100 - rssi;
struct ieee80211_hw *dev = dev_id;
struct adm8211_priv *priv = dev->priv;
- unsigned int count = 0;
- u32 stsr;
-
- do {
- stsr = ADM8211_CSR_READ(STSR);
- ADM8211_CSR_WRITE(STSR, stsr);
- if (stsr == 0xffffffff)
- return IRQ_HANDLED;
-
- if (!(stsr & (ADM8211_STSR_NISS | ADM8211_STSR_AISS)))
- break;
-
- if (stsr & ADM8211_STSR_RCI)
- adm8211_interrupt_rci(dev);
- if (stsr & ADM8211_STSR_TCI)
- adm8211_interrupt_tci(dev);
-
- /*ADM8211_INT(LinkOn);*/
- /*ADM8211_INT(LinkOff);*/
-
- ADM8211_INT(PCF);
- ADM8211_INT(BCNTC);
- ADM8211_INT(GPINT);
- ADM8211_INT(ATIMTC);
- ADM8211_INT(TSFTF);
- ADM8211_INT(TSCZ);
- ADM8211_INT(SQL);
- ADM8211_INT(WEPTD);
- ADM8211_INT(ATIME);
- /*ADM8211_INT(TBTT);*/
- ADM8211_INT(TEIS);
- ADM8211_INT(FBE);
- ADM8211_INT(REIS);
- ADM8211_INT(GPTT);
- ADM8211_INT(RPS);
- ADM8211_INT(RDU);
- ADM8211_INT(TUF);
- /*ADM8211_INT(TRT);*/
- /*ADM8211_INT(TLT);*/
- /*ADM8211_INT(TDU);*/
- ADM8211_INT(TPS);
-
- } while (count++ < 20);
-
- return IRQ_RETVAL(count);
+ u32 stsr = ADM8211_CSR_READ(STSR);
+ ADM8211_CSR_WRITE(STSR, stsr);
+ if (stsr == 0xffffffff)
+ return IRQ_HANDLED;
+
+ if (!(stsr & (ADM8211_STSR_NISS | ADM8211_STSR_AISS)))
+ return IRQ_HANDLED;
+
+ if (stsr & ADM8211_STSR_RCI)
+ adm8211_interrupt_rci(dev);
+ if (stsr & ADM8211_STSR_TCI)
+ adm8211_interrupt_tci(dev);
+
+ /*ADM8211_INT(LinkOn);*/
+ /*ADM8211_INT(LinkOff);*/
+
+ ADM8211_INT(PCF);
+ ADM8211_INT(BCNTC);
+ ADM8211_INT(GPINT);
+ ADM8211_INT(ATIMTC);
+ ADM8211_INT(TSFTF);
+ ADM8211_INT(TSCZ);
+ ADM8211_INT(SQL);
+ ADM8211_INT(WEPTD);
+ ADM8211_INT(ATIME);
+ /*ADM8211_INT(TBTT);*/
+ ADM8211_INT(TEIS);
+ ADM8211_INT(FBE);
+ ADM8211_INT(REIS);
+ ADM8211_INT(GPTT);
+ ADM8211_INT(RPS);
+ ADM8211_INT(RDU);
+ ADM8211_INT(TUF);
+ /*ADM8211_INT(TRT);*/
+ /*ADM8211_INT(TLT);*/
+ /*ADM8211_INT(TDU);*/
+ ADM8211_INT(TPS);
+
+ return IRQ_HANDLED;
#undef ADM8211_INT
}
adm8211_rf_write_syn_rfmd2958(dev, 0x0A, reg);
/* set TXRX TX_GAIN */
adm8211_rf_write_syn_rfmd2958(dev, 0x09, 0x00050 |
- (priv->revid < ADM8211_REV_CA ? tx_power : 0));
+ (priv->pdev->revision < ADM8211_REV_CA ? tx_power : 0));
} else {
reg = ADM8211_CSR_READ(PLCPHD);
reg &= 0xff00ffff;
tx_power<<2);
adm8211_write_bbp(dev, RF3000_LOW_GAIN_CALIB, lpf_cutoff);
adm8211_write_bbp(dev, RF3000_HIGH_GAIN_CALIB, lnags_thresh);
- adm8211_write_bbp(dev, 0x1c, priv->revid == ADM8211_REV_BA ?
+ adm8211_write_bbp(dev, 0x1c, priv->pdev->revision == ADM8211_REV_BA ?
priv->eeprom->cr28 : 0);
adm8211_write_bbp(dev, 0x1d, priv->eeprom->cr29);
priv->nar |= ADM8211_NAR_EA | ADM8211_NAR_ST | ADM8211_NAR_SR;
/* don't trust the error bits on rev 0x20 and up in adhoc */
- if (priv->revid >= ADM8211_REV_BA)
+ if (priv->pdev->revision >= ADM8211_REV_BA)
priv->soft_rx_crc = 1;
break;
case IEEE80211_IF_TYPE_MNTR:
break;
}
- switch (priv->revid) {
+ switch (priv->pdev->revision) {
case ADM8211_REV_CA:
if (priv->transceiver_type == ADM8211_RFMD2958 ||
priv->transceiver_type == ADM8211_RFMD2958_RF3000_CONTROL_POWER ||
adm8211_write_bbp(dev, 0x1c, 0x00);
adm8211_write_bbp(dev, 0x1d, 0x80);
} else {
- if (priv->revid == ADM8211_REV_BA)
+ if (priv->pdev->revision == ADM8211_REV_BA)
adm8211_write_bbp(dev, 0x1c, priv->eeprom->cr28);
else
adm8211_write_bbp(dev, 0x1c, 0x00);
u8 rate_buf[12] = {0};
/* write supported rates */
- if (priv->revid != ADM8211_REV_BA) {
+ if (priv->pdev->revision != ADM8211_REV_BA) {
rate_buf[0] = ARRAY_SIZE(adm8211_rates);
for (i = 0; i < ARRAY_SIZE(adm8211_rates); i++)
rate_buf[i + 1] = (adm8211_rates[i].rate / 5) | 0x80;
* PWR0PE2 = 13 us
* PWR1PE2 = 1 us
* PWR0TXPE = 8 or 6 */
- if (priv->revid < ADM8211_REV_CA)
+ if (priv->pdev->revision < ADM8211_REV_CA)
ADM8211_CSR_WRITE(TOFS2, 0x8815cd18);
else
ADM8211_CSR_WRITE(TOFS2, 0x8535cd16);
/* SLOT=20 us, SIFS=110 cycles of 22 MHz (5 us),
* DIFS=50 us, EIFS=100 us */
- if (priv->revid < ADM8211_REV_CA)
+ if (priv->pdev->revision < ADM8211_REV_CA)
ADM8211_CSR_WRITE(IFST, (20 << 23) | (110 << 15) |
(50 << 9) | 100);
else
/* Clear the missed-packet counter. */
ADM8211_CSR_READ(LPC);
-
- if (!priv->mac_addr)
- return;
-
- /* set mac address */
- ADM8211_CSR_WRITE(PAR0, *(u32 *)priv->mac_addr);
- ADM8211_CSR_WRITE(PAR1, *(u16 *)&priv->mac_addr[4]);
}
static int adm8211_hw_reset(struct ieee80211_hw *dev)
ADM8211_CSR_WRITE(PAR, tmp);
- if (priv->revid == ADM8211_REV_BA &&
+ if (priv->pdev->revision == ADM8211_REV_BA &&
(priv->transceiver_type == ADM8211_RFMD2958_RF3000_CONTROL_POWER ||
priv->transceiver_type == ADM8211_RFMD2958)) {
reg = ADM8211_CSR_READ(CSR_TEST1);
reg |= (1 << 4) | (1 << 5);
ADM8211_CSR_WRITE(CSR_TEST1, reg);
- } else if (priv->revid == ADM8211_REV_CA) {
+ } else if (priv->pdev->revision == ADM8211_REV_CA) {
reg = ADM8211_CSR_READ(CSR_TEST1);
reg &= ~((1 << 4) | (1 << 5));
ADM8211_CSR_WRITE(CSR_TEST1, reg);
ADM8211_CSR_WRITE(BPLI, reg);
}
-static void adm8211_set_bssid(struct ieee80211_hw *dev, u8 *bssid)
+static void adm8211_set_bssid(struct ieee80211_hw *dev, const u8 *bssid)
{
struct adm8211_priv *priv = dev->priv;
u32 reg;
- reg = bssid[0] | (bssid[1] << 8) | (bssid[2] << 16) | (bssid[3] << 24);
- ADM8211_CSR_WRITE(BSSID0, reg);
+ ADM8211_CSR_WRITE(BSSID0, le32_to_cpu(*(__le32 *)bssid));
reg = ADM8211_CSR_READ(ABDA1);
reg &= 0x0000ffff;
reg |= (bssid[4] << 16) | (bssid[5] << 24);
return 0;
}
-static int adm8211_config_interface(struct ieee80211_hw *dev, int if_id,
+static int adm8211_config_interface(struct ieee80211_hw *dev,
+ struct ieee80211_vif *vif,
struct ieee80211_if_conf *conf)
{
struct adm8211_priv *priv = dev->priv;
return 0;
}
+static void adm8211_configure_filter(struct ieee80211_hw *dev,
+ unsigned int changed_flags,
+ unsigned int *total_flags,
+ int mc_count, struct dev_mc_list *mclist)
+{
+ static const u8 bcast[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
+ struct adm8211_priv *priv = dev->priv;
+ unsigned int bit_nr, new_flags;
+ u32 mc_filter[2];
+ int i;
+
+ new_flags = 0;
+
+ if (*total_flags & FIF_PROMISC_IN_BSS) {
+ new_flags |= FIF_PROMISC_IN_BSS;
+ priv->nar |= ADM8211_NAR_PR;
+ priv->nar &= ~ADM8211_NAR_MM;
+ mc_filter[1] = mc_filter[0] = ~0;
+ } else if ((*total_flags & FIF_ALLMULTI) || (mc_count > 32)) {
+ new_flags |= FIF_ALLMULTI;
+ priv->nar &= ~ADM8211_NAR_PR;
+ priv->nar |= ADM8211_NAR_MM;
+ mc_filter[1] = mc_filter[0] = ~0;
+ } else {
+ priv->nar &= ~(ADM8211_NAR_MM | ADM8211_NAR_PR);
+ mc_filter[1] = mc_filter[0] = 0;
+ for (i = 0; i < mc_count; i++) {
+ if (!mclist)
+ break;
+ bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
+
+ bit_nr &= 0x3F;
+ mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
+ mclist = mclist->next;
+ }
+ }
+
+ ADM8211_IDLE_RX();
+
+ ADM8211_CSR_WRITE(MAR0, mc_filter[0]);
+ ADM8211_CSR_WRITE(MAR1, mc_filter[1]);
+ ADM8211_CSR_READ(NAR);
+
+ if (priv->nar & ADM8211_NAR_PR)
+ dev->flags |= IEEE80211_HW_RX_INCLUDES_FCS;
+ else
+ dev->flags &= ~IEEE80211_HW_RX_INCLUDES_FCS;
+
+ if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
+ adm8211_set_bssid(dev, bcast);
+ else
+ adm8211_set_bssid(dev, priv->bssid);
+
+ ADM8211_RESTORE();
+
+ *total_flags = new_flags;
+}
+
static int adm8211_add_interface(struct ieee80211_hw *dev,
struct ieee80211_if_init_conf *conf)
{
struct adm8211_priv *priv = dev->priv;
- /* NOTE: using IEEE80211_IF_TYPE_MGMT to indicate no mode selected */
- if (priv->mode != IEEE80211_IF_TYPE_MGMT)
- return -1;
+ if (priv->mode != IEEE80211_IF_TYPE_MNTR)
+ return -EOPNOTSUPP;
switch (conf->type) {
case IEEE80211_IF_TYPE_STA:
- case IEEE80211_IF_TYPE_MNTR:
priv->mode = conf->type;
break;
default:
return -EOPNOTSUPP;
}
- priv->mac_addr = conf->mac_addr;
+ ADM8211_IDLE();
+
+ ADM8211_CSR_WRITE(PAR0, le32_to_cpu(*(__le32 *)conf->mac_addr));
+ ADM8211_CSR_WRITE(PAR1, le16_to_cpu(*(__le16 *)(conf->mac_addr + 4)));
+
+ adm8211_update_mode(dev);
+
+ ADM8211_RESTORE();
return 0;
}
struct ieee80211_if_init_conf *conf)
{
struct adm8211_priv *priv = dev->priv;
- priv->mode = IEEE80211_IF_TYPE_MGMT;
+ priv->mode = IEEE80211_IF_TYPE_MNTR;
}
static int adm8211_init_rings(struct ieee80211_hw *dev)
}
}
-static int adm8211_open(struct ieee80211_hw *dev)
+static int adm8211_start(struct ieee80211_hw *dev)
{
struct adm8211_priv *priv = dev->priv;
int retval;
ADM8211_CSR_WRITE(IER, ADM8211_IER_NIE | ADM8211_IER_AIE |
ADM8211_IER_RCIE | ADM8211_IER_TCIE |
ADM8211_IER_TDUIE | ADM8211_IER_GPTIE);
+ priv->mode = IEEE80211_IF_TYPE_MNTR;
adm8211_update_mode(dev);
ADM8211_CSR_WRITE(RDR, 0);
return retval;
}
-static int adm8211_stop(struct ieee80211_hw *dev)
+static void adm8211_stop(struct ieee80211_hw *dev)
{
struct adm8211_priv *priv = dev->priv;
+ priv->mode = IEEE80211_IF_TYPE_INVALID;
priv->nar = 0;
ADM8211_CSR_WRITE(NAR, 0);
ADM8211_CSR_WRITE(IER, 0);
free_irq(priv->pdev->irq, dev);
adm8211_free_rings(dev);
- return 0;
}
static void adm8211_calc_durations(int *dur, int *plcp, size_t payload_len, int len,
static const struct ieee80211_ops adm8211_ops = {
.tx = adm8211_tx,
- .open = adm8211_open,
+ .start = adm8211_start,
.stop = adm8211_stop,
.add_interface = adm8211_add_interface,
.remove_interface = adm8211_remove_interface,
.config = adm8211_config,
.config_interface = adm8211_config_interface,
- .set_multicast_list = adm8211_set_rx_mode,
+ .configure_filter = adm8211_configure_filter,
.get_stats = adm8211_get_stats,
.get_tx_stats = adm8211_get_tx_stats,
.get_tsf = adm8211_get_tsft
u8 perm_addr[ETH_ALEN];
DECLARE_MAC_BUF(mac);
-#ifndef MODULE
- static unsigned int cardidx;
- if (!cardidx++)
- printk(version);
-#endif
-
err = pci_enable_device(pdev);
if (err) {
printk(KERN_ERR "%s (adm8211): Cannot enable new PCI device\n",
goto err_iounmap;
}
- pci_read_config_byte(pdev, PCI_CLASS_REVISION, &priv->revid);
-
- *(u32 *)perm_addr = le32_to_cpu((__force __le32)ADM8211_CSR_READ(PAR0));
- *(u16 *)&perm_addr[4] =
- le16_to_cpu((__force __le16)ADM8211_CSR_READ(PAR1) & 0xFFFF);
+ *(__le32 *)perm_addr = cpu_to_le32(ADM8211_CSR_READ(PAR0));
+ *(__le16 *)&perm_addr[4] =
+ cpu_to_le16(ADM8211_CSR_READ(PAR1) & 0xFFFF);
if (!is_valid_ether_addr(perm_addr)) {
printk(KERN_WARNING "%s (adm8211): Invalid hwaddr in EEPROM!\n",
priv->tx_power = 0x40;
priv->lpf_cutoff = 0xFF;
priv->lnags_threshold = 0xFF;
- priv->mode = IEEE80211_IF_TYPE_MGMT;
+ priv->mode = IEEE80211_IF_TYPE_INVALID;
/* Power-on issue. EEPROM won't read correctly without */
- if (priv->revid >= ADM8211_REV_BA) {
+ if (pdev->revision >= ADM8211_REV_BA) {
ADM8211_CSR_WRITE(FRCTL, 0);
ADM8211_CSR_READ(FRCTL);
ADM8211_CSR_WRITE(FRCTL, 1);
printk(KERN_INFO "%s: hwaddr %s, Rev 0x%02x\n",
wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
- priv->revid);
+ pdev->revision);
return 0;
struct ieee80211_hw *dev = pci_get_drvdata(pdev);
struct adm8211_priv *priv = dev->priv;
- if (priv->mode != IEEE80211_IF_TYPE_MGMT) {
+ if (priv->mode != IEEE80211_IF_TYPE_INVALID) {
ieee80211_stop_queues(dev);
adm8211_stop(dev);
}
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
- if (priv->mode != IEEE80211_IF_TYPE_MGMT) {
- adm8211_open(dev);
+ if (priv->mode != IEEE80211_IF_TYPE_INVALID) {
+ adm8211_start(dev);
ieee80211_start_queues(dev);
}
static int __init adm8211_init(void)
{
-#ifdef MODULE
- printk(version);
-#endif
-
return pci_register_driver(&adm8211_driver);
}
projects / linux-2.6-omap-h63xx.git / blobdiff