Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/linville/wireles...

[linux-2.6-omap-h63xx.git] / drivers / net / wireless / iwlwifi / iwl-4965-hw.h

diff --git a/drivers/net/wireless/iwlwifi/iwl-4965-hw.h b/drivers/net/wireless/iwlwifi/iwl-4965-hw.h
index 1898888e71f26e716b7526f1098a46707f402a0c..1a66b508a8eaf7efdec1e2c971205437422d64dd 100644 (file)
--- a/drivers/net/wireless/iwlwifi/iwl-4965-hw.h
+++ b/drivers/net/wireless/iwlwifi/iwl-4965-hw.h
@@ -126,16 +126,18 @@
 /* Sizes and addresses for instruction and data memory (SRAM) in
  * 4965's embedded processor.  Driver access is via HBUS_TARG_MEM_* regs. */
 #define RTC_INST_LOWER_BOUND                   (0x000000)
-#define KDR_RTC_INST_UPPER_BOUND               (0x018000)
+#define IWL49_RTC_INST_UPPER_BOUND             (0x018000)
 
 #define RTC_DATA_LOWER_BOUND                   (0x800000)
-#define KDR_RTC_DATA_UPPER_BOUND               (0x80A000)
+#define IWL49_RTC_DATA_UPPER_BOUND             (0x80A000)
 
-#define KDR_RTC_INST_SIZE    (KDR_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND)
-#define KDR_RTC_DATA_SIZE    (KDR_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND)
+#define IWL49_RTC_INST_SIZE    \
+                       (IWL49_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND)
+#define IWL49_RTC_DATA_SIZE    \
+                       (IWL49_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND)
 
-#define IWL_MAX_INST_SIZE KDR_RTC_INST_SIZE
-#define IWL_MAX_DATA_SIZE KDR_RTC_DATA_SIZE
+#define IWL_MAX_INST_SIZE IWL49_RTC_INST_SIZE
+#define IWL_MAX_DATA_SIZE IWL49_RTC_DATA_SIZE
 
 /* Size of uCode instruction memory in bootstrap state machine */
 #define IWL_MAX_BSM_SIZE BSM_SRAM_SIZE
@@ -143,7 +145,7 @@
 static inline int iwl4965_hw_valid_rtc_data_addr(u32 addr)
 {
        return (addr >= RTC_DATA_LOWER_BOUND) &&
-              (addr < KDR_RTC_DATA_UPPER_BOUND);
+              (addr < IWL49_RTC_DATA_UPPER_BOUND);
 }
 
 /********************* START TEMPERATURE *************************************/
@@ -1383,10 +1385,10 @@ static inline __le32 iwl4965_hw_set_rate_n_flags(u8 rate, u16 flags)
  * up to 7 DMA channels (FIFOs).  Each Tx queue is supported by a circular array
  * in DRAM containing 256 Transmit Frame Descriptors (TFDs).
  */
-#define IWL4965_MAX_WIN_SIZE              64
-#define IWL4965_QUEUE_SIZE               256
-#define IWL4965_NUM_FIFOS                  7
-#define IWL_MAX_NUM_QUEUES                16
+#define IWL4965_MAX_WIN_SIZE   64
+#define IWL4965_QUEUE_SIZE     256
+#define IWL4965_NUM_FIFOS      7
+#define IWL4965_MAX_NUM_QUEUES 16
 
 
 /**
@@ -1551,30 +1553,30 @@ struct iwl4965_sched_queue_byte_cnt_tbl {
  */
 struct iwl4965_shared {
        struct iwl4965_sched_queue_byte_cnt_tbl
-        queues_byte_cnt_tbls[IWL_MAX_NUM_QUEUES];
-       __le32 val0;
+        queues_byte_cnt_tbls[IWL4965_MAX_NUM_QUEUES];
+       __le32 rb_closed;
 
        /* __le32 rb_closed_stts_rb_num:12; */
 #define IWL_rb_closed_stts_rb_num_POS 0
 #define IWL_rb_closed_stts_rb_num_LEN 12
-#define IWL_rb_closed_stts_rb_num_SYM val0
+#define IWL_rb_closed_stts_rb_num_SYM rb_closed
        /* __le32 rsrv1:4; */
        /* __le32 rb_closed_stts_rx_frame_num:12; */
 #define IWL_rb_closed_stts_rx_frame_num_POS 16
 #define IWL_rb_closed_stts_rx_frame_num_LEN 12
-#define IWL_rb_closed_stts_rx_frame_num_SYM val0
+#define IWL_rb_closed_stts_rx_frame_num_SYM rb_closed
        /* __le32 rsrv2:4; */
 
-       __le32 val1;
+       __le32 frm_finished;
        /* __le32 frame_finished_stts_rb_num:12; */
 #define IWL_frame_finished_stts_rb_num_POS 0
 #define IWL_frame_finished_stts_rb_num_LEN 12
-#define IWL_frame_finished_stts_rb_num_SYM val1
+#define IWL_frame_finished_stts_rb_num_SYM frm_finished
        /* __le32 rsrv3:4; */
        /* __le32 frame_finished_stts_rx_frame_num:12; */
 #define IWL_frame_finished_stts_rx_frame_num_POS 16
 #define IWL_frame_finished_stts_rx_frame_num_LEN 12
-#define IWL_frame_finished_stts_rx_frame_num_SYM val1
+#define IWL_frame_finished_stts_rx_frame_num_SYM frm_finished
        /* __le32 rsrv4:4; */
 
        __le32 padding1;  /* so that allocation will be aligned to 16B */