x86: use WARN() in arch/x86/mm/ioremap.c

[linux-2.6-omap-h63xx.git] / drivers / pci / setup-bus.c

diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index f9b7bdd278292c633717ecfe0eb265a1ed97a864..827c0a520e2b3aec87bcc2a160720fbd48e836b2 100644 (file)
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -27,13 +27,6 @@
 #include <linux/slab.h>
 
 
-#define DEBUG_CONFIG 1
-#if DEBUG_CONFIG
-#define DBG(x...)     printk(x)
-#else
-#define DBG(x...)
-#endif
-
 static void pbus_assign_resources_sorted(struct pci_bus *bus)
 {
        struct pci_dev *dev;
@@ -81,8 +74,8 @@ void pci_setup_cardbus(struct pci_bus *bus)
        struct pci_dev *bridge = bus->self;
        struct pci_bus_region region;
 
-       printk("PCI: Bus %d, cardbus bridge: %s\n",
-               bus->number, pci_name(bridge));
+       dev_info(&bridge->dev, "CardBus bridge, secondary bus %04x:%02x\n",
+                pci_domain_nr(bus), bus->number);
 
        pcibios_resource_to_bus(bridge, &region, bus->resource[0]);
        if (bus->resource[0]->flags & IORESOURCE_IO) {
@@ -90,7 +83,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
                 * The IO resource is allocated a range twice as large as it
                 * would normally need.  This allows us to set both IO regs.
                 */
-               printk(KERN_INFO "  IO window: 0x%08lx-0x%08lx\n",
+               dev_info(&bridge->dev, "  IO window: %#08lx-%#08lx\n",
                       (unsigned long)region.start,
                       (unsigned long)region.end);
                pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
@@ -101,7 +94,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
 
        pcibios_resource_to_bus(bridge, &region, bus->resource[1]);
        if (bus->resource[1]->flags & IORESOURCE_IO) {
-               printk(KERN_INFO "  IO window: 0x%08lx-0x%08lx\n",
+               dev_info(&bridge->dev, "  IO window: %#08lx-%#08lx\n",
                       (unsigned long)region.start,
                       (unsigned long)region.end);
                pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
@@ -112,7 +105,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
 
        pcibios_resource_to_bus(bridge, &region, bus->resource[2]);
        if (bus->resource[2]->flags & IORESOURCE_MEM) {
-               printk(KERN_INFO "  PREFETCH window: 0x%08lx-0x%08lx\n",
+               dev_info(&bridge->dev, "  PREFETCH window: %#08lx-%#08lx\n",
                       (unsigned long)region.start,
                       (unsigned long)region.end);
                pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
@@ -123,7 +116,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
 
        pcibios_resource_to_bus(bridge, &region, bus->resource[3]);
        if (bus->resource[3]->flags & IORESOURCE_MEM) {
-               printk(KERN_INFO "  MEM window: 0x%08lx-0x%08lx\n",
+               dev_info(&bridge->dev, "  MEM window: %#08lx-%#08lx\n",
                       (unsigned long)region.start,
                       (unsigned long)region.end);
                pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
@@ -151,7 +144,8 @@ static void pci_setup_bridge(struct pci_bus *bus)
        struct pci_bus_region region;
        u32 l, bu, lu, io_upper16;
 
-       DBG(KERN_INFO "PCI: Bridge: %s\n", pci_name(bridge));
+       dev_info(&bridge->dev, "PCI bridge, secondary bus %04x:%02x\n",
+                pci_domain_nr(bus), bus->number);
 
        /* Set up the top and bottom of the PCI I/O segment for this bus. */
        pcibios_resource_to_bus(bridge, &region, bus->resource[0]);
@@ -162,7 +156,7 @@ static void pci_setup_bridge(struct pci_bus *bus)
                l |= region.end & 0xf000;
                /* Set up upper 16 bits of I/O base/limit. */
                io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
-               DBG(KERN_INFO "  IO window: %04lx-%04lx\n",
+               dev_info(&bridge->dev, "  IO window: %#04lx-%#04lx\n",
                    (unsigned long)region.start,
                    (unsigned long)region.end);
        }
@@ -170,7 +164,7 @@ static void pci_setup_bridge(struct pci_bus *bus)
                /* Clear upper 16 bits of I/O base/limit. */
                io_upper16 = 0;
                l = 0x00f0;
-               DBG(KERN_INFO "  IO window: disabled.\n");
+               dev_info(&bridge->dev, "  IO window: disabled\n");
        }
        /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
        pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
@@ -185,13 +179,13 @@ static void pci_setup_bridge(struct pci_bus *bus)
        if (bus->resource[1]->flags & IORESOURCE_MEM) {
                l = (region.start >> 16) & 0xfff0;
                l |= region.end & 0xfff00000;
-               DBG(KERN_INFO "  MEM window: 0x%08lx-0x%08lx\n",
+               dev_info(&bridge->dev, "  MEM window: %#08lx-%#08lx\n",
                    (unsigned long)region.start,
                    (unsigned long)region.end);
        }
        else {
                l = 0x0000fff0;
-               DBG(KERN_INFO "  MEM window: disabled.\n");
+               dev_info(&bridge->dev, "  MEM window: disabled\n");
        }
        pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
 
@@ -208,13 +202,13 @@ static void pci_setup_bridge(struct pci_bus *bus)
                l |= region.end & 0xfff00000;
                bu = upper_32_bits(region.start);
                lu = upper_32_bits(region.end);
-               DBG(KERN_INFO "  PREFETCH window: 0x%016llx-0x%016llx\n",
+               dev_info(&bridge->dev, "  PREFETCH window: %#016llx-%#016llx\n",
                    (unsigned long long)region.start,
                    (unsigned long long)region.end);
        }
        else {
                l = 0x0000fff0;
-               DBG(KERN_INFO "  PREFETCH window: disabled.\n");
+               dev_info(&bridge->dev, "  PREFETCH window: disabled\n");
        }
        pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
 
@@ -361,9 +355,8 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, unsigned long
                        align = (i < PCI_BRIDGE_RESOURCES) ? r_size : r->start;
                        order = __ffs(align) - 20;
                        if (order > 11) {
-                               printk(KERN_WARNING "PCI: region %s/%d "
-                                      "too large: 0x%016llx-0x%016llx\n",
-                                       pci_name(dev), i,
+                               dev_warn(&dev->dev, "BAR %d too large: "
+                                      "%#016llx-%#016llx\n", i,
                                       (unsigned long long)r->start,
                                       (unsigned long long)r->end);
                                r->flags = 0;
@@ -416,13 +409,13 @@ static void pci_bus_size_cardbus(struct pci_bus *bus)
         * Reserve some resources for CardBus.  We reserve
         * a fixed amount of bus space for CardBus bridges.
         */
-       b_res[0].start = pci_cardbus_io_size;
-       b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1;
-       b_res[0].flags |= IORESOURCE_IO;
+       b_res[0].start = 0;
+       b_res[0].end = pci_cardbus_io_size - 1;
+       b_res[0].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
 
-       b_res[1].start = pci_cardbus_io_size;
-       b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
-       b_res[1].flags |= IORESOURCE_IO;
+       b_res[1].start = 0;
+       b_res[1].end = pci_cardbus_io_size - 1;
+       b_res[1].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
 
        /*
         * Check whether prefetchable memory is supported
@@ -441,17 +434,17 @@ static void pci_bus_size_cardbus(struct pci_bus *bus)
         * twice the size.
         */
        if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
-               b_res[2].start = pci_cardbus_mem_size;
-               b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
-               b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
+               b_res[2].start = 0;
+               b_res[2].end = pci_cardbus_mem_size - 1;
+               b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_SIZEALIGN;
 
-               b_res[3].start = pci_cardbus_mem_size;
-               b_res[3].end = b_res[3].start + pci_cardbus_mem_size - 1;
-               b_res[3].flags |= IORESOURCE_MEM;
+               b_res[3].start = 0;
+               b_res[3].end = pci_cardbus_mem_size - 1;
+               b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
        } else {
-               b_res[3].start = pci_cardbus_mem_size * 2;
-               b_res[3].end = b_res[3].start + pci_cardbus_mem_size * 2 - 1;
-               b_res[3].flags |= IORESOURCE_MEM;
+               b_res[3].start = 0;
+               b_res[3].end = pci_cardbus_mem_size * 2 - 1;
+               b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
        }
 }
 
@@ -529,8 +522,8 @@ void __ref pci_bus_assign_resources(struct pci_bus *bus)
                        break;
 
                default:
-                       printk(KERN_INFO "PCI: not setting up bridge %s "
-                              "for bus %d\n", pci_name(dev), b->number);
+                       dev_info(&dev->dev, "not setting up bridge for bus "
+                                "%04x:%02x\n", pci_domain_nr(b), b->number);
                        break;
                }
        }