]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/scsi/qla2xxx/qla_fw.h
Merge commit 'v2.6.27-rc6' into x86/pat
[linux-2.6-omap-h63xx.git] / drivers / scsi / qla2xxx / qla_fw.h
index 5d19b0e49a628d6e28beb1dd592df07e4baacd6c..cf194517400d4d8f76f34dd29319a3045124e670 100644 (file)
@@ -719,7 +719,7 @@ struct tsk_mgmt_entry {
 
        uint16_t timeout;               /* Command timeout. */
 
-       uint8_t lun[8];                 /* FCP LUN (BE). */
+       struct scsi_lun lun;            /* FCP LUN (BE). */
 
        uint32_t control_flags;         /* Control Flags. */
 #define TCF_NOTMCMD_TO_TARGET  BIT_31
@@ -1036,22 +1036,6 @@ struct mid_db_entry_24xx {
        uint8_t reserved_1;
 };
 
- /*
- * Virtual Fabric ID type definition.
- */
-typedef struct vf_id {
-        uint16_t id : 12;
-        uint16_t priority : 4;
-} vf_id_t;
-
-/*
- * Virtual Fabric HopCt type definition.
- */
-typedef struct vf_hopct {
-        uint16_t reserved : 8;
-        uint16_t hopct : 8;
-} vf_hopct_t;
-
 /*
  * Virtual Port Control IOCB
  */
@@ -1082,10 +1066,10 @@ struct vp_ctrl_entry_24xx {
 
        uint8_t vp_idx_map[16];
        uint16_t flags;
-       struct vf_id    id;
+       uint16_t id;
        uint16_t reserved_4;
-       struct vf_hopct  hopct;
-       uint8_t reserved_5[8];
+       uint16_t hopct;
+       uint8_t reserved_5[24];
 };
 
 /*
@@ -1132,9 +1116,9 @@ struct vp_config_entry_24xx {
        uint16_t reserved_vp2;
        uint8_t port_name_idx2[WWN_SIZE];
        uint8_t node_name_idx2[WWN_SIZE];
-       struct vf_id    id;
+       uint16_t id;
        uint16_t reserved_4;
-       struct vf_hopct  hopct;
+       uint16_t hopct;
        uint8_t reserved_5;
 };
 
@@ -1186,4 +1170,159 @@ struct vf_evfp_entry_24xx {
 };
 
 /* END MID Support ***********************************************************/
+
+/* Flash Description Table ***************************************************/
+
+struct qla_fdt_layout {
+       uint8_t sig[4];
+       uint16_t version;
+       uint16_t len;
+       uint16_t checksum;
+       uint8_t unused1[2];
+       uint8_t model[16];
+       uint16_t man_id;
+       uint16_t id;
+       uint8_t flags;
+       uint8_t erase_cmd;
+       uint8_t alt_erase_cmd;
+       uint8_t wrt_enable_cmd;
+       uint8_t wrt_enable_bits;
+       uint8_t wrt_sts_reg_cmd;
+       uint8_t unprotect_sec_cmd;
+       uint8_t read_man_id_cmd;
+       uint32_t block_size;
+       uint32_t alt_block_size;
+       uint32_t flash_size;
+       uint32_t wrt_enable_data;
+       uint8_t read_id_addr_len;
+       uint8_t wrt_disable_bits;
+       uint8_t read_dev_id_len;
+       uint8_t chip_erase_cmd;
+       uint16_t read_timeout;
+       uint8_t protect_sec_cmd;
+       uint8_t unused2[65];
+};
+
+/* 84XX Support **************************************************************/
+
+#define MBA_ISP84XX_ALERT      0x800f  /* Alert Notification. */
+#define A84_PANIC_RECOVERY     0x1
+#define A84_OP_LOGIN_COMPLETE  0x2
+#define A84_DIAG_LOGIN_COMPLETE        0x3
+#define A84_GOLD_LOGIN_COMPLETE        0x4
+
+#define MBC_ISP84XX_RESET      0x3a    /* Reset. */
+
+#define FSTATE_REMOTE_FC_DOWN  BIT_0
+#define FSTATE_NSL_LINK_DOWN   BIT_1
+#define FSTATE_IS_DIAG_FW      BIT_2
+#define FSTATE_LOGGED_IN       BIT_3
+#define FSTATE_WAITING_FOR_VERIFY      BIT_4
+
+#define VERIFY_CHIP_IOCB_TYPE  0x1B
+struct verify_chip_entry_84xx {
+       uint8_t entry_type;
+       uint8_t entry_count;
+       uint8_t sys_defined;
+       uint8_t entry_status;
+
+       uint32_t handle;
+
+       uint16_t options;
+#define VCO_DONT_UPDATE_FW     BIT_0
+#define VCO_FORCE_UPDATE       BIT_1
+#define VCO_DONT_RESET_UPDATE  BIT_2
+#define VCO_DIAG_FW            BIT_3
+#define VCO_END_OF_DATA                BIT_14
+#define VCO_ENABLE_DSD         BIT_15
+
+       uint16_t reserved_1;
+
+       uint16_t data_seg_cnt;
+       uint16_t reserved_2[3];
+
+       uint32_t fw_ver;
+       uint32_t exchange_address;
+
+       uint32_t reserved_3[3];
+       uint32_t fw_size;
+       uint32_t fw_seq_size;
+       uint32_t relative_offset;
+
+       uint32_t dseg_address[2];
+       uint32_t dseg_length;
+};
+
+struct verify_chip_rsp_84xx {
+       uint8_t entry_type;
+       uint8_t entry_count;
+       uint8_t sys_defined;
+       uint8_t entry_status;
+
+       uint32_t handle;
+
+       uint16_t comp_status;
+#define CS_VCS_CHIP_FAILURE    0x3
+#define CS_VCS_BAD_EXCHANGE    0x8
+#define CS_VCS_SEQ_COMPLETEi   0x40
+
+       uint16_t failure_code;
+#define VFC_CHECKSUM_ERROR     0x1
+#define VFC_INVALID_LEN                0x2
+#define VFC_ALREADY_IN_PROGRESS        0x8
+
+       uint16_t reserved_1[4];
+
+       uint32_t fw_ver;
+       uint32_t exchange_address;
+
+       uint32_t reserved_2[6];
+};
+
+#define ACCESS_CHIP_IOCB_TYPE  0x2B
+struct access_chip_84xx {
+       uint8_t entry_type;
+       uint8_t entry_count;
+       uint8_t sys_defined;
+       uint8_t entry_status;
+
+       uint32_t handle;
+
+       uint16_t options;
+#define ACO_DUMP_MEMORY                0x0
+#define ACO_LOAD_MEMORY                0x1
+#define ACO_CHANGE_CONFIG_PARAM        0x2
+#define ACO_REQUEST_INFO       0x3
+
+       uint16_t reserved1;
+
+       uint16_t dseg_count;
+       uint16_t reserved2[3];
+
+       uint32_t parameter1;
+       uint32_t parameter2;
+       uint32_t parameter3;
+
+       uint32_t reserved3[3];
+       uint32_t total_byte_cnt;
+       uint32_t reserved4;
+
+       uint32_t dseg_address[2];
+       uint32_t dseg_length;
+};
+
+struct access_chip_rsp_84xx {
+       uint8_t entry_type;
+       uint8_t entry_count;
+       uint8_t sys_defined;
+       uint8_t entry_status;
+
+       uint32_t handle;
+
+       uint16_t comp_status;
+       uint16_t failure_code;
+       uint32_t residual_count;
+
+       uint32_t reserved[12];
+};
 #endif