/*
- * QLOGIC LINUX SOFTWARE
- *
- * QLogic ISP2x00 device driver for Linux 2.6.x
- * Copyright (C) 2003-2005 QLogic Corporation
- * (www.qlogic.com)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2, or (at your option) any
- * later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License for more details.
+ * QLogic Fibre Channel HBA Driver
+ * Copyright (c) 2003-2005 QLogic Corporation
*
+ * See LICENSE.qla2xxx for copyright and licensing details.
*/
#include "qla_def.h"
* LIP to complete
*/
- if (atomic_read(&ha->loop_state) ==
- LOOP_DOWN && retry--) {
+ if (atomic_read(&ha->loop_state) !=
+ LOOP_READY && retry--) {
goto check_fw_ready_again;
}
wait_time--;
qla2100_pci_config(scsi_qla_host_t *ha)
{
uint16_t w, mwi;
+ uint32_t d;
unsigned long flags;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
pci_write_config_word(ha->pdev, PCI_COMMAND, w);
/* Reset expansion ROM address decode enable */
- pci_read_config_word(ha->pdev, PCI_ROM_ADDRESS, &w);
- w &= ~PCI_ROM_ADDRESS_ENABLE;
- pci_write_config_word(ha->pdev, PCI_ROM_ADDRESS, w);
+ pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
+ d &= ~PCI_ROM_ADDRESS_ENABLE;
+ pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
/* Get PCI bus information. */
spin_lock_irqsave(&ha->hardware_lock, flags);
qla2300_pci_config(scsi_qla_host_t *ha)
{
uint16_t w, mwi;
+ uint32_t d;
unsigned long flags = 0;
uint32_t cnt;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
/* Reset expansion ROM address decode enable */
- pci_read_config_word(ha->pdev, PCI_ROM_ADDRESS, &w);
- w &= ~PCI_ROM_ADDRESS_ENABLE;
- pci_write_config_word(ha->pdev, PCI_ROM_ADDRESS, w);
+ pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
+ d &= ~PCI_ROM_ADDRESS_ENABLE;
+ pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
/* Get PCI bus information. */
spin_lock_irqsave(&ha->hardware_lock, flags);
qla24xx_pci_config(scsi_qla_host_t *ha)
{
uint16_t w, mwi;
+ uint32_t d;
unsigned long flags = 0;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
int pcix_cmd_reg, pcie_dctl_reg;
}
/* Reset expansion ROM address decode enable */
- pci_read_config_word(ha->pdev, PCI_ROM_ADDRESS, &w);
- w &= ~PCI_ROM_ADDRESS_ENABLE;
- pci_write_config_word(ha->pdev, PCI_ROM_ADDRESS, w);
+ pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
+ d &= ~PCI_ROM_ADDRESS_ENABLE;
+ pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
/* Get PCI bus information. */
spin_lock_irqsave(&ha->hardware_lock, flags);
unsigned long flags = 0;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
uint32_t cnt, d2;
+ uint16_t wd;
spin_lock_irqsave(&ha->hardware_lock, flags);
WRT_REG_DWORD(®->ctrl_status,
CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
- RD_REG_DWORD(®->ctrl_status);
+ pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
+ udelay(100);
/* Wait for firmware to complete NVRAM accesses. */
- udelay(5);
d2 = (uint32_t) RD_REG_WORD(®->mailbox0);
for (cnt = 10000 ; cnt && d2; cnt--) {
udelay(5);
barrier();
}
- udelay(20);
+ /* Wait for soft-reset to complete. */
d2 = RD_REG_DWORD(®->ctrl_status);
for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
udelay(5);
rval = qla2x00_get_adapter_id(ha,
&loop_id, &al_pa, &area, &domain, &topo);
if (rval != QLA_SUCCESS) {
- qla_printk(KERN_WARNING, ha,
- "ERROR -- Unable to get host loop ID.\n");
- set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
+ if (LOOP_NOT_READY(ha) || atomic_read(&ha->loop_down_timer) ||
+ (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
+ DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
+ __func__, ha->host_no));
+ } else {
+ qla_printk(KERN_WARNING, ha,
+ "ERROR -- Unable to get host loop ID.\n");
+ set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
+ }
return (rval);
}
nvram_t *nv = (nvram_t *)ha->request_ring;
uint8_t *ptr = (uint8_t *)ha->request_ring;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
- uint8_t timer_mode;
rval = QLA_SUCCESS;
ha->flags.process_response_queue = 1;
} else {
- /* Enable ZIO -- Support mode 5 only. */
- timer_mode = icb->add_firmware_options[0] &
- (BIT_3 | BIT_2 | BIT_1 | BIT_0);
+ /* Enable ZIO. */
+ if (!ha->flags.init_done) {
+ ha->zio_mode = icb->add_firmware_options[0] &
+ (BIT_3 | BIT_2 | BIT_1 | BIT_0);
+ ha->zio_timer = icb->interrupt_delay_timer ?
+ icb->interrupt_delay_timer: 2;
+ }
icb->add_firmware_options[0] &=
~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
- if (ql2xenablezio)
- timer_mode = BIT_2 | BIT_0;
- if (timer_mode == (BIT_2 | BIT_0)) {
- DEBUG2(printk("scsi(%ld): ZIO enabled; timer delay "
- "(%d).\n", ha->host_no, ql2xintrdelaytimer));
+ ha->flags.process_response_queue = 0;
+ if (ha->zio_mode != QLA_ZIO_DISABLED) {
+ DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
+ "delay (%d us).\n", ha->host_no, ha->zio_mode,
+ ha->zio_timer * 100));
qla_printk(KERN_INFO, ha,
- "ZIO enabled; timer delay (%d).\n",
- ql2xintrdelaytimer);
+ "ZIO mode %d enabled; timer delay (%d us).\n",
+ ha->zio_mode, ha->zio_timer * 100);
- icb->add_firmware_options[0] |= timer_mode;
- icb->interrupt_delay_timer = ql2xintrdelaytimer;
+ icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
+ icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
ha->flags.process_response_queue = 1;
}
}
return (rval);
}
+static void
+qla2x00_rport_add(void *data)
+{
+ fc_port_t *fcport = data;
+
+ qla2x00_reg_remote_port(fcport->ha, fcport);
+}
+
+static void
+qla2x00_rport_del(void *data)
+{
+ fc_port_t *fcport = data;
+
+ if (fcport->rport)
+ fc_remote_port_delete(fcport->rport);
+ fcport->rport = NULL;
+}
+
/**
* qla2x00_alloc_fcport() - Allocate a generic fcport.
* @ha: HA context
* Returns a pointer to the allocated fcport, or NULL, if none available.
*/
fc_port_t *
-qla2x00_alloc_fcport(scsi_qla_host_t *ha, int flags)
+qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
{
fc_port_t *fcport;
atomic_set(&fcport->state, FCS_UNCONFIGURED);
fcport->flags = FCF_RLC_SUPPORT;
fcport->supported_classes = FC_COS_UNSPECIFIED;
+ INIT_WORK(&fcport->rport_add_work, qla2x00_rport_add, fcport);
+ INIT_WORK(&fcport->rport_del_work, qla2x00_rport_del, fcport);
return (fcport);
}
}
if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
- if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
+ if (LOOP_NOT_READY(ha)) {
rval = QLA_FUNCTION_FAILED;
} else {
rval = qla2x00_configure_fabric(ha);
}
cleanup_allocation:
- if (new_fcport)
- kfree(new_fcport);
+ kfree(new_fcport);
if (rval != QLA_SUCCESS) {
DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
struct fc_rport *rport;
if (fcport->rport) {
- fc_remote_port_unblock(fcport->rport);
- return;
+ fc_remote_port_delete(fcport->rport);
+ fcport->rport = NULL;
}
rport_ids.node_name = wwn_to_u64(fcport->node_name);
"Unable to allocate fc remote port!\n");
return;
}
- rport->dd_data = fcport;
+ *((fc_port_t **)rport->dd_data) = fcport;
rport->supported_classes = fcport->supported_classes;
rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
/* Allocate temporary fcport for any new fcports discovered. */
new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
if (new_fcport == NULL) {
- if (swl)
- kfree(swl);
+ kfree(swl);
return (QLA_MEMORY_ALLOC_FAILED);
}
new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
if (qla2x00_is_reserved_id(ha, loop_id))
continue;
- if (atomic_read(&ha->loop_down_timer) ||
- test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
+ if (atomic_read(&ha->loop_down_timer) || LOOP_NOT_READY(ha))
break;
if (swl != NULL) {
nxt_d_id.b24 = new_fcport->d_id.b24;
new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
if (new_fcport == NULL) {
- if (swl)
- kfree(swl);
+ kfree(swl);
return (QLA_MEMORY_ALLOC_FAILED);
}
new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
new_fcport->d_id.b24 = nxt_d_id.b24;
}
- if (swl)
- kfree(swl);
-
- if (new_fcport)
- kfree(new_fcport);
+ kfree(swl);
+ kfree(new_fcport);
if (!list_empty(new_fcports))
ha->device_flags |= DFLG_FABRIC_DEVICES;
fcport->d_id.b.domain, fcport->d_id.b.area,
fcport->d_id.b.al_pa);
fcport->loop_id = FC_NO_LOOP_ID;
- atomic_set(&fcport->state, FCS_DEVICE_DEAD);
+ fcport->login_retry = 0;
rval = 3;
break;
if (ql2xloginretrycount)
ha->login_retry_count = ql2xloginretrycount;
+ /* Enable ZIO. */
+ if (!ha->flags.init_done) {
+ ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
+ (BIT_3 | BIT_2 | BIT_1 | BIT_0);
+ ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
+ le16_to_cpu(icb->interrupt_delay_timer): 2;
+ }
+ icb->firmware_options_2 &= __constant_cpu_to_le32(
+ ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
+ ha->flags.process_response_queue = 0;
+ if (ha->zio_mode != QLA_ZIO_DISABLED) {
+ DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
+ "(%d us).\n", ha->host_no, ha->zio_mode,
+ ha->zio_timer * 100));
+ qla_printk(KERN_INFO, ha,
+ "ZIO mode %d enabled; timer delay (%d us).\n",
+ ha->zio_mode, ha->zio_timer * 100);
+
+ icb->firmware_options_2 |= cpu_to_le32(
+ (uint32_t)ha->zio_mode);
+ icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
+ ha->flags.process_response_queue = 1;
+ }
+
if (rval) {
DEBUG2_3(printk(KERN_WARNING
"scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
projects / linux-2.6-omap-h63xx.git / blobdiff