#include "qla_def.h"
#include <linux/delay.h>
+#include <linux/vmalloc.h>
#include <asm/uaccess.h>
static uint16_t qla2x00_nvram_request(scsi_qla_host_t *, uint32_t);
* qla2x00_lock_nvram_access() -
* @ha: HA context
*/
-void
+static void
qla2x00_lock_nvram_access(scsi_qla_host_t *ha)
{
uint16_t data;
* qla2x00_unlock_nvram_access() -
* @ha: HA context
*/
-void
+static void
qla2x00_unlock_nvram_access(scsi_qla_host_t *ha)
{
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
*
* Returns the word read from nvram @addr.
*/
-uint16_t
+static uint16_t
qla2x00_get_nvram_word(scsi_qla_host_t *ha, uint32_t addr)
{
uint16_t data;
* @addr: Address in NVRAM to write
* @data: word to program
*/
-void
+static void
qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data)
{
int count;
int ret;
uint32_t liter, miter;
uint32_t sec_mask, rest_addr, conf_addr;
- uint32_t fdata, findex ;
+ uint32_t fdata, findex, cnt;
uint8_t man_id, flash_id;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
dma_addr_t optrom_dma;
}
/* Go with burst-write. */
- if (optrom && (liter + OPTROM_BURST_DWORDS) < dwords) {
+ if (optrom && (liter + OPTROM_BURST_DWORDS) <= dwords) {
/* Copy data to DMA'ble buffer. */
for (miter = 0, s = optrom, d = dwptr;
miter < OPTROM_BURST_DWORDS; miter++, s++, d++)
0xff0000) | ((fdata >> 16) & 0xff));
}
- /* Enable flash write-protection. */
+ /* Enable flash write-protection and wait for completion. */
qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0x9c);
+ for (cnt = 300; cnt &&
+ qla24xx_read_flash_dword(ha,
+ flash_conf_to_access_addr(0x005)) & BIT_0;
+ cnt--) {
+ udelay(10);
+ }
/* Disable flash write. */
WRT_REG_DWORD(®->ctrl_status,
int ret, stat;
uint32_t i;
uint16_t *wptr;
+ unsigned long flags;
ret = QLA_SUCCESS;
+ spin_lock_irqsave(&ha->hardware_lock, flags);
qla2x00_lock_nvram_access(ha);
/* Disable NVRAM write-protection. */
qla2x00_set_nvram_protection(ha, stat);
qla2x00_unlock_nvram_access(ha);
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
return ret;
}
uint32_t i;
uint32_t *dwptr;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
+ unsigned long flags;
ret = QLA_SUCCESS;
+ spin_lock_irqsave(&ha->hardware_lock, flags);
/* Enable flash write. */
WRT_REG_DWORD(®->ctrl_status,
RD_REG_DWORD(®->ctrl_status) | CSRX_FLASH_ENABLE);
WRT_REG_DWORD(®->ctrl_status,
RD_REG_DWORD(®->ctrl_status) & ~CSRX_FLASH_ENABLE);
RD_REG_DWORD(®->ctrl_status); /* PCI Posting. */
+ spin_unlock_irqrestore(&ha->hardware_lock, flags);
return ret;
}
qla25xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
uint32_t bytes)
{
- return qla24xx_write_flash_data(ha, (uint32_t *)buf,
- FA_VPD_NVRAM_ADDR | naddr, bytes >> 2);
+#define RMW_BUFFER_SIZE (64 * 1024)
+ uint8_t *dbuf;
+
+ dbuf = vmalloc(RMW_BUFFER_SIZE);
+ if (!dbuf)
+ return QLA_MEMORY_ALLOC_FAILED;
+ ha->isp_ops->read_optrom(ha, dbuf, FA_VPD_NVRAM_ADDR << 2,
+ RMW_BUFFER_SIZE);
+ memcpy(dbuf + (naddr << 2), buf, bytes);
+ ha->isp_ops->write_optrom(ha, dbuf, FA_VPD_NVRAM_ADDR << 2,
+ RMW_BUFFER_SIZE);
+ vfree(dbuf);
+
+ return QLA_SUCCESS;
}
static inline void