/* Wait for NVRAM to become ready */
WRT_REG_WORD(®->nvram, NVR_SELECT);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
do {
NVRAM_DELAY();
word = RD_REG_WORD(®->nvram);
/* Wait for NVRAM to become ready */
WRT_REG_WORD(®->nvram, NVR_SELECT);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
do {
NVRAM_DELAY();
word = RD_REG_WORD(®->nvram);
/* Read data from NVRAM. */
for (cnt = 0; cnt < 16; cnt++) {
WRT_REG_WORD(®->nvram, NVR_SELECT | NVR_CLOCK);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
NVRAM_DELAY();
data <<= 1;
reg_data = RD_REG_WORD(®->nvram);
/* Wait for NVRAM to become ready. */
WRT_REG_WORD(®->nvram, NVR_SELECT);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
do {
NVRAM_DELAY();
word = RD_REG_WORD(®->nvram);
/* Wait for NVRAM to become ready. */
WRT_REG_WORD(®->nvram, NVR_SELECT);
+ RD_REG_WORD(®->nvram); /* PCI Posting. */
do {
NVRAM_DELAY();
word = RD_REG_WORD(®->nvram);
}
} while (0);
+ /* Enable flash write-protection. */
+ qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0x9c);
+
/* Disable flash write. */
WRT_REG_DWORD(®->ctrl_status,
RD_REG_DWORD(®->ctrl_status) & ~CSRX_FLASH_ENABLE);