* and irqs should show there too...
*/
#define UWIRE_BASE_PHYS 0xFFFB3000
-#define UWIRE_BASE ((void *__iomem)IO_ADDRESS(UWIRE_BASE_PHYS))
/* uWire Registers: */
#define UWIRE_IO_SIZE 0x20
};
/* REVISIT compile time constant for idx_shift? */
+/*
+ * Or, put it in a structure which is used throughout the driver;
+ * that avoids having to issue two loads for each bit of static data.
+ */
static unsigned int uwire_idx_shift;
+static void __iomem *uwire_base;
static inline void uwire_write_reg(int idx, u16 val)
{
- __raw_writew(val, UWIRE_BASE + (idx << uwire_idx_shift));
+ __raw_writew(val, uwire_base + (idx << uwire_idx_shift));
}
static inline u16 uwire_read_reg(int idx)
{
- return __raw_readw(UWIRE_BASE + (idx << uwire_idx_shift));
+ return __raw_readw(uwire_base + (idx << uwire_idx_shift));
}
static inline void omap_uwire_configure_mode(u8 cs, unsigned long flags)
#ifdef VERBOSE
pr_debug("%s: write-%d =%04x\n",
- spi->dev.bus_id, bits, val);
+ dev_name(&spi->dev), bits, val);
#endif
if (wait_uwire_csr_flag(CSRB, 0, 0))
goto eio;
status += bytes;
#ifdef VERBOSE
pr_debug("%s: read-%d =%04x\n",
- spi->dev.bus_id, bits, val);
+ dev_name(&spi->dev), bits, val);
#endif
}
uwire = spi_master_get_devdata(spi->master);
if (spi->chip_select > 3) {
- pr_debug("%s: cs%d?\n", spi->dev.bus_id, spi->chip_select);
+ pr_debug("%s: cs%d?\n", dev_name(&spi->dev), spi->chip_select);
status = -ENODEV;
goto done;
}
bits = 8;
if (bits > 16) {
- pr_debug("%s: wordsize %d?\n", spi->dev.bus_id, bits);
+ pr_debug("%s: wordsize %d?\n", dev_name(&spi->dev), bits);
status = -ENODEV;
goto done;
}
hz = t->speed_hz;
if (!hz) {
- pr_debug("%s: zero speed?\n", spi->dev.bus_id);
+ pr_debug("%s: zero speed?\n", dev_name(&spi->dev));
status = -EINVAL;
goto done;
}
}
if (div1_idx == 4) {
pr_debug("%s: lowest clock %ld, need %d\n",
- spi->dev.bus_id, rate / 10 / 8, hz);
+ dev_name(&spi->dev), rate / 10 / 8, hz);
status = -EDOM;
goto done;
}
return -ENODEV;
uwire = spi_master_get_devdata(master);
+
+ uwire_base = ioremap(UWIRE_BASE_PHYS, UWIRE_IO_SIZE);
+ if (!uwire_base) {
+ dev_dbg(&pdev->dev, "can't ioremap UWIRE\n");
+ spi_master_put(master);
+ return -ENOMEM;
+ }
+
dev_set_drvdata(&pdev->dev, uwire);
- uwire->ck = clk_get(&pdev->dev, "armxor_ck");
- if (!uwire->ck || IS_ERR(uwire->ck)) {
- dev_dbg(&pdev->dev, "no mpu_xor_clk ?\n");
+ uwire->ck = clk_get(&pdev->dev, "fck");
+ if (IS_ERR(uwire->ck)) {
+ status = PTR_ERR(uwire->ck);
+ dev_dbg(&pdev->dev, "no functional clock?\n");
spi_master_put(master);
- return -ENODEV;
+ return status;
}
clk_enable(uwire->ck);
uwire->bitbang.txrx_bufs = uwire_txrx;
status = spi_bitbang_start(&uwire->bitbang);
- if (status < 0)
+ if (status < 0) {
uwire_off(uwire);
+ iounmap(uwire_base);
+ }
return status;
}
status = spi_bitbang_stop(&uwire->bitbang);
uwire_off(uwire);
+ iounmap(uwire_base);
return status;
}