musb_hdrc: Fixes before pulling from mainline tree

[linux-2.6-omap-h63xx.git] / drivers / usb / musb / musb_host.c

diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 2ad2ed95404aa23c039ef5fde6979a54ddebd357..08e421fa363be0a36ec2cd9d54d83f4c73a331b5 100644 (file)
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -103,7 +103,7 @@
 
 static void musb_ep_program(struct musb *musb, u8 epnum,
                        struct urb *urb, unsigned int nOut,
-                       u8 * buf, u32 len);
+                       u8 *buf, u32 len);
 
 /*
  * Clear TX fifo. Needed to avoid BABBLE errors.
@@ -210,7 +210,7 @@ musb_start_urb(struct musb *musb, int is_in, struct musb_qh *qh)
                        case USB_ENDPOINT_XFER_BULK:    s = "-bulk"; break;
                        case USB_ENDPOINT_XFER_ISOC:    s = "-iso"; break;
                        default:                        s = "-intr"; break;
-                       }; s;}),
+                       }; s; }),
                        epnum, buf, len);
 
        /* Configure endpoint */
@@ -244,7 +244,7 @@ musb_start_urb(struct musb *musb, int is_in, struct musb_qh *qh)
                } else {
                        qh->frame = urb->start_frame;
                        /* enable SOF interrupt so we can count down */
-DBG(1,"SOF for %d\n", epnum);
+                       DBG(1, "SOF for %d\n", epnum);
 #if 1 /* ifndef        CONFIG_ARCH_DAVINCI */
                        musb_writeb(mbase, MUSB_INTRUSBE, 0xff);
 #endif
@@ -422,7 +422,11 @@ musb_advance_schedule(struct musb *musb, struct urb *urb,
                qh = hw_ep->in_qh;
        else
                qh = hw_ep->out_qh;
-       qh = musb_giveback(qh, urb, 0);
+
+       if (urb->status == -EINPROGRESS)
+               qh = musb_giveback(qh, urb, 0);
+       else
+               qh = musb_giveback(qh, urb, urb->status);
 
        if (qh && qh->is_ready && !list_empty(&qh->hep->urb_list)) {
                DBG(4, "... next ep%d %cX urb %p\n",
@@ -439,10 +443,9 @@ static inline u16 musb_h_flush_rxfifo(struct musb_hw_ep *hw_ep, u16 csr)
         * leave toggle alone (may not have been saved yet)
         */
        csr |= MUSB_RXCSR_FLUSHFIFO | MUSB_RXCSR_RXPKTRDY;
-       csr &= ~( MUSB_RXCSR_H_REQPKT
+       csr &= ~(MUSB_RXCSR_H_REQPKT
                | MUSB_RXCSR_H_AUTOREQ
-               | MUSB_RXCSR_AUTOCLEAR
-               );
+               | MUSB_RXCSR_AUTOCLEAR);
 
        /* write 2x to allow double buffering */
        musb_writew(hw_ep->regs, MUSB_RXCSR, csr);
@@ -581,7 +584,7 @@ musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep)
        } else {
                csr = musb_readw(ep->regs, MUSB_RXCSR);
                if (csr & MUSB_RXCSR_RXPKTRDY)
-                       WARN("rx%d, packet/%d ready?\n", ep->epnum,
+                       WARNING("rx%d, packet/%d ready?\n", ep->epnum,
                                musb_readw(ep->regs, MUSB_RXCOUNT));
 
                musb_h_flush_rxfifo(ep, MUSB_RXCSR_CLRDATATOG);
@@ -614,7 +617,7 @@ musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep)
  */
 static void musb_ep_program(struct musb *musb, u8 epnum,
                        struct urb *urb, unsigned int is_out,
-                       u8 * buf, u32 len)
+                       u8 *buf, u32 len)
 {
        struct dma_controller   *dma_controller;
        struct dma_channel      *dma_channel;
@@ -754,7 +757,7 @@ static void musb_ep_program(struct musb *musb, u8 epnum,
                        csr &= ~(MUSB_TXCSR_AUTOSET
                                | MUSB_TXCSR_DMAMODE
                                | MUSB_TXCSR_DMAENAB);
-                        csr |= MUSB_TXCSR_MODE;
+                       csr |= MUSB_TXCSR_MODE;
                        musb_writew(epio, MUSB_TXCSR,
                                csr | MUSB_TXCSR_MODE);
 
@@ -1204,7 +1207,7 @@ void musb_host_tx(struct musb *musb, u8 epnum)
                 * we have a candidate... NAKing is *NOT* an error
                 */
                musb_ep_select(mbase, epnum);
-               musb_writew(epio, MUSB_CSR0,
+               musb_writew(epio, MUSB_TXCSR,
                                MUSB_TXCSR_H_WZC_BITS
                                | MUSB_TXCSR_TXPKTRDY);
                goto finish;
@@ -1270,8 +1273,8 @@ void musb_host_tx(struct musb *musb, u8 epnum)
                        if (qh->segsize < qh->maxpacket)
                                done = true;
                        else if (qh->offset == urb->transfer_buffer_length
-                                       && !(urb-> transfer_flags
-                                                       & URB_ZERO_PACKET))
+                                       && !(urb->transfer_flags
+                                               & URB_ZERO_PACKET))
                                done = true;
                        if (!done) {
                                buf = urb->transfer_buffer
@@ -1400,7 +1403,7 @@ void musb_host_rx(struct musb *musb, u8 epnum)
 
        pipe = urb->pipe;
 
-       DBG(5, "<== hw %d rxcsr %04x, urb actual %d (+dma %zd)\n",
+       DBG(5, "<== hw %d rxcsr %04x, urb actual %d (+dma %zu)\n",
                epnum, rx_csr, urb->actual_length,
                dma ? dma->actual_len : 0);
 
@@ -1450,7 +1453,7 @@ void musb_host_rx(struct musb *musb, u8 epnum)
                        (void) musb->dma_controller->channel_abort(dma);
                        xfer_len = dma->actual_len;
                }
-               musb_h_flush_rxfifo(hw_ep, 0);
+               musb_h_flush_rxfifo(hw_ep, MUSB_RXCSR_CLRDATATOG);
                musb_writeb(epio, MUSB_RXINTERVAL, 0);
                done = true;
                goto finish;
@@ -1483,7 +1486,7 @@ void musb_host_rx(struct musb *musb, u8 epnum)
                        done = true;
                }
 
-               DBG(2, "RXCSR%d %04x, reqpkt, len %zd%s\n", epnum, rx_csr,
+               DBG(2, "RXCSR%d %04x, reqpkt, len %zu%s\n", epnum, rx_csr,
                                xfer_len, dma ? ", dma" : "");
                rx_csr &= ~MUSB_RXCSR_H_REQPKT;
 
@@ -1542,7 +1545,7 @@ void musb_host_rx(struct musb *musb, u8 epnum)
                if (dma) {
                        struct dma_controller   *c;
                        u16                     rx_count;
-                       int                     status;
+                       int                     ret;
 
                        rx_count = musb_readw(epio, MUSB_RXCOUNT);
 
@@ -1601,7 +1604,7 @@ void musb_host_rx(struct musb *musb, u8 epnum)
                         * transfer_buffer_length needs to be
                         * adjusted first...
                         */
-                       status = c->channel_program(
+                       ret = c->channel_program(
                                dma, qh->maxpacket,
                                dma->desired_mode,
                                urb->transfer_dma
@@ -1610,7 +1613,7 @@ void musb_host_rx(struct musb *musb, u8 epnum)
                                        ? rx_count
                                        : urb->transfer_buffer_length);
 
-                       if (!status) {
+                       if (!ret) {
                                c->channel_release(dma);
                                dma = hw_ep->rx_channel = NULL;
                                /* REVISIT reset CSR */
@@ -1757,7 +1760,9 @@ static int musb_urb_enqueue(
        if (!is_host_active(musb) || !musb->is_active)
                return -ENODEV;
 
+       spin_lock_irqsave(&musb->lock, flags);
        ret = usb_hcd_link_urb_to_ep(hcd, urb);
+       spin_unlock_irqrestore(&musb->lock, flags);
        if (ret)
                return ret;
 
@@ -1943,13 +1948,12 @@ static int musb_cleanup_urb(struct urb *urb, struct musb_qh *qh, int is_in)
        } else {
                musb_h_tx_flush_fifo(ep);
                csr = musb_readw(epio, MUSB_TXCSR);
-               csr &= ~( MUSB_TXCSR_AUTOSET
+               csr &= ~(MUSB_TXCSR_AUTOSET
                        | MUSB_TXCSR_DMAENAB
                        | MUSB_TXCSR_H_RXSTALL
                        | MUSB_TXCSR_H_NAKTIMEOUT
                        | MUSB_TXCSR_H_ERROR
-                       | MUSB_TXCSR_TXPKTRDY
-                       );
+                       | MUSB_TXCSR_TXPKTRDY);
                musb_writew(epio, MUSB_TXCSR, csr);
                /* REVISIT may need to clear FLUSHFIFO ... */
                musb_writew(epio, MUSB_TXCSR, csr);
@@ -2121,7 +2125,7 @@ static int musb_bus_suspend(struct usb_hcd *hcd)
                return 0;
 
        if (is_host_active(musb) && musb->is_active) {
-               WARN("trying to suspend as %s is_active=%i\n",
+               WARNING("trying to suspend as %s is_active=%i\n",
                        otg_state_string(musb), musb->is_active);
                return -EBUSY;
        } else
@@ -2137,7 +2141,7 @@ static int musb_bus_resume(struct usb_hcd *hcd)
 const struct hc_driver musb_hc_driver = {
        .description            = "musb-hcd",
        .product_desc           = "MUSB HDRC host driver",
-       .hcd_priv_size          = sizeof (struct musb),
+       .hcd_priv_size          = sizeof(struct musb),
        .flags                  = HCD_USB2 | HCD_MEMORY,
 
        /* not using irq handler or reset hooks from usbcore, since