[ARM] 4197/1: S3C2443: IRQ number updates

[linux-2.6-omap-h63xx.git] / include / asm-arm / arch-iop32x / entry-macro.S

diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
index c5ec1e23cbea28650aebbbc5b60524b80ccfcc1a..1500cbbd2295802644dbea87c3575e8477f5e98d 100644 (file)
--- a/include/asm-arm/arch-iop32x/entry-macro.S
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -3,26 +3,19 @@
  *
  * Low-level IRQ helper macros for IOP32x-based platforms
  *
- * This file is licensed under  the terms of the GNU General Public
+ * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <asm/arch/irqs.h>
+#include <asm/arch/iop32x.h>
 
-               .macro  disable_fiq
+               .macro  disable_fiq
                .endm
 
-               /*
-                * Note: only deal with normal interrupts, not FIQ
-                */
-               .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-               mov     \irqnr, #0
+               .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
                ldr     \base, =IOP3XX_REG_ADDR(0x07D8)
                ldr     \irqstat, [\base]               @ Read IINTSRC
-               cmp     \irqstat, #0
-               beq     1001f
-               clz     \irqnr, \irqstat
-               mov     \base, #31
-               subs    \irqnr,\base,\irqnr
-1001:
+               cmp     \irqstat, #0
+               clzne   \irqnr, \irqstat
+               rsbne   \irqnr, \irqnr, #31
                .endm