OMAP3 clock: add OMAP3 DPLL autoidle functions

[linux-2.6-omap-h63xx.git] / include / asm-arm / arch-omap / clock.h

diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h
index 971d167b5eba7c4ac6a0750af056a051d4785a4c..0286202887f2a2f522b7f5b23e851a0db47125bc 100644 (file)
--- a/include/asm-arm/arch-omap/clock.h
+++ b/include/asm-arm/arch-omap/clock.h
@@ -35,14 +35,14 @@ struct dpll_data {
        void __iomem            *mult_div1_reg;
        u32                     mult_mask;
        u32                     div1_mask;
-       void __iomem            *div2_reg;
-       u32                     div2_mask;
 #  if defined(CONFIG_ARCH_OMAP3)
        void __iomem            *control_reg;
        u32                     enable_mask;
        u8                      auto_recal_bit;
        u8                      recal_en_bit;
        u8                      recal_st_bit;
+       void __iomem            *autoidle_reg;
+       u32                     autoidle_mask;
 #  endif
 };
 
@@ -129,15 +129,19 @@ extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
 #define CLOCK_IN_OMAP16XX      (1 << 24)
 #define CLOCK_IN_OMAP242X      (1 << 25)
 #define CLOCK_IN_OMAP243X      (1 << 26)
-#define CLOCK_IN_OMAP343X      (1 << 27)
+#define CLOCK_IN_OMAP343X      (1 << 27)       /* clocks common to all 343X */
 #define PARENT_CONTROLS_CLOCK  (1 << 28)
+#define CLOCK_IN_OMAP3430ES1   (1 << 29)       /* 3430ES1 clocks only */
+#define CLOCK_IN_OMAP3430ES2   (1 << 30)       /* 3430ES2 clocks only */
 
 /* Clksel_rate flags */
-#define DEFAULT_RATE            (1 << 0)
-#define RATE_IN_242X            (1 << 1)
-#define RATE_IN_243X            (1 << 2)
-#define RATE_IN_343X            (1 << 3)
-#define RATE_IN_24XX            (RATE_IN_242X | RATE_IN_243X)
+#define DEFAULT_RATE           (1 << 0)
+#define RATE_IN_242X           (1 << 1)
+#define RATE_IN_243X           (1 << 2)
+#define RATE_IN_343X           (1 << 3)        /* rates common to all 343X */
+#define RATE_IN_3430ES2                (1 << 4)        /* 3430ES2 rates only */
+
+#define RATE_IN_24XX           (RATE_IN_242X | RATE_IN_243X)
 
 
 /* CM_CLKSEL2_PLL.CORE_CLK_SRC options (24XX) */