[ARM] 4721/1: S3C24XX: Ensure watchdog clock is enbaled for hard reset

[linux-2.6-omap-h63xx.git] / include / asm-arm / arch-s3c2410 / debug-macro.S

diff --git a/include/asm-arm/arch-s3c2410/debug-macro.S b/include/asm-arm/arch-s3c2410/debug-macro.S
index c37d3474179baf8a8c681e2778c144112560f21f..9c8cd9abb82ba6bac45b3609be47f949d4f3148f 100644 (file)
--- a/include/asm-arm/arch-s3c2410/debug-macro.S
+++ b/include/asm-arm/arch-s3c2410/debug-macro.S
@@ -58,6 +58,12 @@
 /* fifo level reading */
 
        .macro fifo_level_s3c24xx rd, rx
+               @ check for arm920 vs arm926. currently assume all arm926
+               @ devices have an 64 byte FIFO identical to the s3c2440
+               mrc     p15, 0, \rd, c0, c0
+               and     \rd, \rd, #0xff0
+               teq     \rd, #0x260
+               beq     10000f
                mrc     p15, 0, \rd, c1, c0
                tst     \rd, #1
                addeq   \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
@@ -67,6 +73,7 @@
                and     \rd, \rd, #0x00ff0000
                teq     \rd, #0x00440000                @ is it 2440?
 
+10000:
                ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
                andne   \rd, \rd, #S3C2410_UFSTAT_TXMASK
                andeq   \rd, \rd, #S3C2440_UFSTAT_TXMASK