MMC: S3C24XX MMC/SD driver.

[linux-2.6-omap-h63xx.git] / include / asm-arm / arch-s3c2410 / regs-gpio.h

diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h
index b693158b2d3c28fae653ed989a60568c9aec3af2..497dd06e2c992f5a4466317984580a9232eeb059 100644 (file)
--- a/include/asm-arm/arch-s3c2410/regs-gpio.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpio.h
@@ -529,11 +529,13 @@
 #define S3C2410_GPD14_INP      (0x00 << 28)
 #define S3C2410_GPD14_OUTP     (0x01 << 28)
 #define S3C2410_GPD14_VD22     (0x02 << 28)
+#define S3C2410_GPD14_nSS1     (0x03 << 28)
 
 #define S3C2410_GPD15           S3C2410_GPIONO(S3C2410_GPIO_BANKD, 15)
 #define S3C2410_GPD15_INP      (0x00 << 30)
 #define S3C2410_GPD15_OUTP     (0x01 << 30)
 #define S3C2410_GPD15_VD23     (0x02 << 30)
+#define S3C2410_GPD15_nSS0     (0x03 << 30)
 
 #define S3C2410_GPD_PUPDIS(x)  (1<<(x))
 
@@ -801,12 +803,14 @@
 #define S3C2410_GPG2_INP      (0x00 << 4)
 #define S3C2410_GPG2_OUTP     (0x01 << 4)
 #define S3C2410_GPG2_EINT10   (0x02 << 4)
+#define S3C2410_GPG2_nSS0     (0x03 << 4)
 #define S3C2400_GPG2_CDCLK    (0x02 << 4)
 
 #define S3C2410_GPG3          S3C2410_GPIONO(S3C2410_GPIO_BANKG, 3)
 #define S3C2410_GPG3_INP      (0x00 << 6)
 #define S3C2410_GPG3_OUTP     (0x01 << 6)
 #define S3C2410_GPG3_EINT11   (0x02 << 6)
+#define S3C2410_GPG3_nSS1     (0x03 << 6)
 #define S3C2400_GPG3_I2SSDO   (0x02 << 6)
 #define S3C2400_GPG3_I2SSDI   (0x03 << 6)
 
@@ -1133,12 +1137,16 @@
 #define S3C2412_GPBSLPCON      S3C2410_GPIOREG(0x1C)
 #define S3C2412_GPCSLPCON      S3C2410_GPIOREG(0x2C)
 #define S3C2412_GPDSLPCON      S3C2410_GPIOREG(0x3C)
-#define S3C2412_GPESLPCON      S3C2410_GPIOREG(0x4C)
 #define S3C2412_GPFSLPCON      S3C2410_GPIOREG(0x5C)
 #define S3C2412_GPGSLPCON      S3C2410_GPIOREG(0x6C)
 #define S3C2412_GPHSLPCON      S3C2410_GPIOREG(0x7C)
 
 /* definitions for each pin bit */
+#define S3C2412_GPIO_SLPCON_LOW         ( 0x00 )
+#define S3C2412_GPIO_SLPCON_HIGH ( 0x01 )
+#define S3C2412_GPIO_SLPCON_IN   ( 0x02 )
+#define S3C2412_GPIO_SLPCON_PULL ( 0x03 )
+
 #define S3C2412_SLPCON_LOW(x)  ( 0x00 << ((x) * 2))
 #define S3C2412_SLPCON_HIGH(x) ( 0x01 << ((x) * 2))
 #define S3C2412_SLPCON_IN(x)   ( 0x02 << ((x) * 2))