#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78)
#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C)
-#define S3C2412_PWRCFG_BATF_IGNORE (0<<0)
+#define S3C2412_PWRCFG_BATF_IRQ (1<<0)
+#define S3C2412_PWRCFG_BATF_IGNORE (2<<0)
#define S3C2412_PWRCFG_BATF_SLEEP (3<<0)
#define S3C2412_PWRCFG_BATF_MASK (3<<0)