Merge git://git.infradead.org/hdrcleanup-2.6

[linux-2.6-omap-h63xx.git] / include / asm-arm / system.h

diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index ec91d1ff032a5ebbeff161a91a83ef25932eb51e..9c744ae6c6e3b8b9fb47c84524ee0e4c2fb200f1 100644 (file)
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -3,7 +3,6 @@
 
 #ifdef __KERNEL__
 
-#include <linux/config.h>
 
 #define CPU_ARCH_UNKNOWN       0
 #define CPU_ARCH_ARMv3         1
@@ -108,6 +107,31 @@ extern void __show_regs(struct pt_regs *);
 extern int cpu_architecture(void);
 extern void cpu_init(void);
 
+/*
+ * Intel's XScale3 core supports some v6 features (supersections, L2)
+ * but advertises itself as v5 as it does not support the v6 ISA.  For
+ * this reason, we need a way to explicitly test for this type of CPU.
+ */
+#ifndef CONFIG_CPU_XSC3
+#define cpu_is_xsc3()  0
+#else
+static inline int cpu_is_xsc3(void)
+{
+       extern unsigned int processor_id;
+
+       if ((processor_id & 0xffffe000) == 0x69056000)
+               return 1;
+
+       return 0;
+}
+#endif
+
+#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
+#define        cpu_is_xscale() 0
+#else
+#define        cpu_is_xscale() 1
+#endif
+
 #define set_cr(x)                                      \
        __asm__ __volatile__(                           \
        "mcr    p15, 0, %0, c1, c0, 0   @ set CR"       \