Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6

[linux-2.6-omap-h63xx.git] / include / asm-arm / tlbflush.h

diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 9387a5e1ffe007ef5ed62c4ad79308f651749118..d97fc76189a5e5c95570424a19e0e0f5790a8fea 100644 (file)
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -10,7 +10,13 @@
 #ifndef _ASMARM_TLBFLUSH_H
 #define _ASMARM_TLBFLUSH_H
 
-#include <linux/config.h>
+
+#ifndef CONFIG_MMU
+
+#define tlb_flush(tlb) ((void) tlb)
+
+#else /* CONFIG_MMU */
+
 #include <asm/glue.h>
 
 #define TLB_V3_PAGE    (1 << 0)
@@ -340,6 +346,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
                asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr));
        if (tlb_flag(TLB_V6_I_PAGE))
                asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr));
+
+       /* The ARM ARM states that the completion of a TLB maintenance
+        * operation is only guaranteed by a DSB instruction
+        */
+       if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE))
+               asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero));
 }
 
 /*
@@ -417,4 +429,6 @@ extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte
 
 #endif
 
+#endif /* CONFIG_MMU */
+
 #endif