Merge branches 'pxa' and 'orion-fixes1'

[linux-2.6-omap-h63xx.git] / include / asm-ia64 / sn / bte.h

diff --git a/include/asm-ia64/sn/bte.h b/include/asm-ia64/sn/bte.h
index 01e5b41032357a1c615c8326d7c7a7ea12df5882..a0d214f4311560cf100b4f568d78998f4a62b112 100644 (file)
--- a/include/asm-ia64/sn/bte.h
+++ b/include/asm-ia64/sn/bte.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (c) 2000-2006 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2000-2007 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
 
@@ -46,7 +46,7 @@
 #define BTES_PER_NODE (is_shub2() ? 4 : 2)
 #define MAX_BTES_PER_NODE 4
 
-#define BTE2OFF_CTRL   (0)
+#define BTE2OFF_CTRL   0
 #define BTE2OFF_SRC    (SH2_BT_ENG_SRC_ADDR_0 - SH2_BT_ENG_CSR_0)
 #define BTE2OFF_DEST   (SH2_BT_ENG_DEST_ADDR_0 - SH2_BT_ENG_CSR_0)
 #define BTE2OFF_NOTIFY (SH2_BT_ENG_NOTIF_ADDR_0 - SH2_BT_ENG_CSR_0)
@@ -75,11 +75,11 @@
                : base + (BTEOFF_NOTIFY/8))
 
 /* Define hardware modes */
-#define BTE_NOTIFY (IBCT_NOTIFY)
+#define BTE_NOTIFY IBCT_NOTIFY
 #define BTE_NORMAL BTE_NOTIFY
 #define BTE_ZERO_FILL (BTE_NOTIFY | IBCT_ZFIL_MODE)
 /* Use a reserved bit to let the caller specify a wait for any BTE */
-#define BTE_WACQUIRE (0x4000)
+#define BTE_WACQUIRE 0x4000
 /* Use the BTE on the node with the destination memory */
 #define BTE_USE_DEST (BTE_WACQUIRE << 1)
 /* Use any available BTE interface on any node for the transfer */
@@ -150,6 +150,35 @@ typedef enum {
        BTEFAIL_NOTAVAIL,       /* BTE not available */
 } bte_result_t;
 
+#define BTEFAIL_SH2_RESP_SHORT 0x1     /* bit 000001 */
+#define BTEFAIL_SH2_RESP_LONG  0x2     /* bit 000010 */
+#define BTEFAIL_SH2_RESP_DSP   0x4     /* bit 000100 */
+#define BTEFAIL_SH2_RESP_ACCESS        0x8     /* bit 001000 */
+#define BTEFAIL_SH2_CRB_TO     0x10    /* bit 010000 */
+#define BTEFAIL_SH2_NACK_LIMIT 0x20    /* bit 100000 */
+#define BTEFAIL_SH2_ALL                0x3F    /* bit 111111 */
+
+#define        BTE_ERR_BITS    0x3FUL
+#define        BTE_ERR_SHIFT   36
+#define BTE_ERR_MASK   (BTE_ERR_BITS << BTE_ERR_SHIFT)
+
+#define BTE_ERROR_RETRY(value)                                         \
+       (is_shub2() ? (value != BTEFAIL_SH2_CRB_TO)                     \
+               : (value != BTEFAIL_TOUT))
+
+/*
+ * On shub1 BTE_ERR_MASK will always be false, so no need for is_shub2()
+ */
+#define BTE_SHUB2_ERROR(_status)                                       \
+       ((_status & BTE_ERR_MASK)                                       \
+          ? (((_status >> BTE_ERR_SHIFT) & BTE_ERR_BITS) | IBLS_ERROR) \
+          : _status)
+
+#define BTE_GET_ERROR_STATUS(_status)                                  \
+       (BTE_SHUB2_ERROR(_status) & ~IBLS_ERROR)
+
+#define BTE_VALID_SH2_ERROR(value)                                     \
+       ((value >= BTEFAIL_SH2_RESP_SHORT) && (value <= BTEFAIL_SH2_ALL))
 
 /*
  * Structure defining a bte.  An instance of this