libata-pmp-prep: implement ATA_LFLAG_DISABLED

[linux-2.6-omap-h63xx.git] / include / asm-ia64 / sn / sn_sal.h

diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index be5d83ad7cb1418a19b86aa16542c3fb48ce94c8..676b31a08c61dc8fd366d1147b8572080fca4e65 100644 (file)
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -32,6 +32,7 @@
 #define  SN_SAL_NO_FAULT_ZONE_VIRTUAL             0x02000010
 #define  SN_SAL_NO_FAULT_ZONE_PHYSICAL            0x02000011
 #define  SN_SAL_PRINT_ERROR                       0x02000012
+#define  SN_SAL_REGISTER_PMI_HANDLER              0x02000014
 #define  SN_SAL_SET_ERROR_HANDLING_FEATURES       0x0200001a   // reentrant
 #define  SN_SAL_GET_FIT_COMPT                     0x0200001b   // reentrant
 #define  SN_SAL_GET_SAPIC_INFO                     0x0200001d
@@ -88,6 +89,8 @@
 #define  SN_SAL_INJECT_ERROR                      0x02000067
 #define  SN_SAL_SET_CPU_NUMBER                    0x02000068
 
+#define  SN_SAL_KERNEL_LAUNCH_EVENT               0x02000069
+
 /*
  * Service-specific constants
  */
@@ -104,6 +107,7 @@
 /* interrupt handling */
 #define SAL_INTR_ALLOC         1
 #define SAL_INTR_FREE          2
+#define SAL_INTR_REDIRECT      3
 
 /*
  * operations available on the generic SN_SAL_SYSCTL_OP
@@ -676,6 +680,25 @@ sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
        return ret_stuff.status;
 }
 
+/*
+ * Register or unregister a function to handle a PMI received by a CPU.
+ * Before calling the registered handler, SAL sets r1 to the value that
+ * was passed in as the global_pointer.
+ *
+ * If the handler pointer is NULL, then the currently registered handler
+ * will be unregistered.
+ *
+ * Returns 0 on success, or a negative value if an error occurred.
+ */
+static inline int
+sn_register_pmi_handler(u64 handler, u64 global_pointer)
+{
+       struct ia64_sal_retval ret_stuff;
+       ia64_sal_oemcall(&ret_stuff, SN_SAL_REGISTER_PMI_HANDLER, handler,
+                        global_pointer, 0, 0, 0, 0, 0);
+       return ret_stuff.status;
+}
+
 /*
  * Change or query the coherence domain for this partition. Each cpu-based
  * nasid is represented by a bit in an array of 64-bit words:
@@ -693,8 +716,8 @@ static inline int
 sn_change_coherence(u64 *new_domain, u64 *old_domain)
 {
        struct ia64_sal_retval ret_stuff;
-       ia64_sal_oemcall(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain,
-                        (u64)old_domain, 0, 0, 0, 0, 0);
+       ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain,
+                               (u64)old_domain, 0, 0, 0, 0, 0);
        return ret_stuff.status;
 }
 
@@ -1155,4 +1178,11 @@ ia64_sn_set_cpu_number(int cpu)
        SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0);
        return rv.status;
 }
+static inline int
+ia64_sn_kernel_launch_event(void)
+{
+       struct ia64_sal_retval rv;
+       SAL_CALL_NOLOCK(rv, SN_SAL_KERNEL_LAUNCH_EVENT, 0, 0, 0, 0, 0, 0, 0);
+       return rv.status;
+}
 #endif /* _ASM_IA64_SN_SN_SAL_H */