r8169: revert "read MAC address from EEPROM on init"

[linux-2.6-omap-h63xx.git] / include / asm-m32r / assembler.h

diff --git a/include/asm-m32r/assembler.h b/include/asm-m32r/assembler.h
index b7f4d8aaeb469b0409103dd8057e3b6f80c2cc8f..26351539b5ff92626f560e97d64eabb3fdb85635 100644 (file)
--- a/include/asm-m32r/assembler.h
+++ b/include/asm-m32r/assembler.h
@@ -9,7 +9,6 @@
  * This file contains M32R architecture specific macro definitions.
  */
 
-#include <linux/config.h>
 
 #ifndef __STR
 #ifdef __ASSEMBLY__
@@ -53,27 +52,27 @@
        .endm
 
 #if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
-#define STI(reg) STI_M reg
-       .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+       .macro ENABLE_INTERRUPTS reg
        setpsw  #0x40       ->  nop
        ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
        .endm
 
-#define CLI(reg) CLI_M reg
-       .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+       .macro DISABLE_INTERRUPTS reg
        clrpsw  #0x40       ->  nop
        ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
        .endm
 #else  /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
-#define STI(reg) STI_M reg
-       .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+       .macro ENABLE_INTERRUPTS reg
        mvfc    \reg, psw
        or3     \reg, \reg, #0x0040
        mvtc    \reg, psw
        .endm
 
-#define CLI(reg) CLI_M reg
-       .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+       .macro DISABLE_INTERRUPTS reg
        mvfc    \reg, psw
        and3    \reg, \reg, #0xffbf
        mvtc    \reg, psw
@@ -109,6 +108,9 @@
        push    r13
        mvfachi r13
        push    r13
+       ldi     r13, #0
+       push    r13             ; dummy push acc1h
+       push    r13             ; dummy push acc1l
 #else
 #error unknown isa configuration
 #endif
@@ -156,6 +158,8 @@
        pop     r13
        mvtaclo r13, a1
 #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
+       pop     r13             ; dummy pop acc1h
+       pop     r13             ; dummy pop acc1l
        pop     r13
        mvtachi r13
        pop     r13