[INET6]: Reorganize struct inet6_dev to save 8 bytes

[linux-2.6-omap-h63xx.git] / include / asm-m68k / atomic.h

diff --git a/include/asm-m68k/atomic.h b/include/asm-m68k/atomic.h
index a4a84d5c65d50eff5cfeca8239a8c6bb16cf71c1..4915294fea63a726cb901ec1799ed9e7bc4586f9 100644 (file)
--- a/include/asm-m68k/atomic.h
+++ b/include/asm-m68k/atomic.h
@@ -1,9 +1,8 @@
 #ifndef __ARCH_M68K_ATOMIC__
 #define __ARCH_M68K_ATOMIC__
 
-#include <linux/config.h>
 
-#include <asm/system.h>        /* local_irq_XXX() */
+#include <asm/system.h>
 
 /*
  * Atomic operations that C can't guarantee us.  Useful for
@@ -55,6 +54,7 @@ static inline int atomic_inc_and_test(atomic_t *v)
 }
 
 #ifdef CONFIG_RMW_INSNS
+
 static inline int atomic_add_return(int i, atomic_t *v)
 {
        int t, tmp;
@@ -82,7 +82,12 @@ static inline int atomic_sub_return(int i, atomic_t *v)
                        : "g" (i), "2" (atomic_read(v)));
        return t;
 }
+
+#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
+#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+
 #else /* !CONFIG_RMW_INSNS */
+
 static inline int atomic_add_return(int i, atomic_t * v)
 {
        unsigned long flags;
@@ -110,6 +115,32 @@ static inline int atomic_sub_return(int i, atomic_t * v)
 
        return t;
 }
+
+static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
+{
+       unsigned long flags;
+       int prev;
+
+       local_irq_save(flags);
+       prev = atomic_read(v);
+       if (prev == old)
+               atomic_set(v, new);
+       local_irq_restore(flags);
+       return prev;
+}
+
+static inline int atomic_xchg(atomic_t *v, int new)
+{
+       unsigned long flags;
+       int prev;
+
+       local_irq_save(flags);
+       prev = atomic_read(v);
+       atomic_set(v, new);
+       local_irq_restore(flags);
+       return prev;
+}
+
 #endif /* !CONFIG_RMW_INSNS */
 
 #define atomic_dec_return(v)   atomic_sub_return(1, (v))
@@ -139,17 +170,21 @@ static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
        __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
 }
 
-#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
-#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
+{
+       int c, old;
+       c = atomic_read(v);
+       for (;;) {
+               if (unlikely(c == (u)))
+                       break;
+               old = atomic_cmpxchg((v), c, c + (a));
+               if (likely(old == c))
+                       break;
+               c = old;
+       }
+       return c != (u);
+}
 
-#define atomic_add_unless(v, a, u)                             \
-({                                                             \
-       int c, old;                                             \
-       c = atomic_read(v);                                     \
-       while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
-               c = old;                                        \
-       c != (u);                                               \
-})
 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
 
 /* Atomic operations are already serializing */