]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - include/asm-mips/barrier.h
Add back missing irq define for INT_34XX_BENCH_MPU_EMUL
[linux-2.6-omap-h63xx.git] / include / asm-mips / barrier.h
index ed82631b0017256747e798e5b69350269576f05b..8e9ac313ca3b498906df6086065c0a067e90614e 100644 (file)
 #define fast_wmb()     __sync()
 #define fast_rmb()     __sync()
 #define fast_mb()      __sync()
+#ifdef CONFIG_SGI_IP28
+#define fast_iob()                             \
+       __asm__ __volatile__(                   \
+               ".set   push\n\t"               \
+               ".set   noreorder\n\t"          \
+               "lw     $0,%0\n\t"              \
+               "sync\n\t"                      \
+               "lw     $0,%0\n\t"              \
+               ".set   pop"                    \
+               : /* no output */               \
+               : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \
+               : "memory")
+#else
 #define fast_iob()                             \
        do {                                    \
                __sync();                       \
                __fast_iob();                   \
        } while (0)
+#endif
 
 #ifdef CONFIG_CPU_HAS_WB
 
 #else
 #define __WEAK_ORDERING_MB     "               \n"
 #endif
+#if defined(CONFIG_WEAK_REORDERING_BEYOND_LLSC) && defined(CONFIG_SMP)
+#define __WEAK_LLSC_MB         "       sync    \n"
+#else
+#define __WEAK_LLSC_MB         "               \n"
+#endif
 
 #define smp_mb()       __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory")
 #define smp_rmb()      __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory")
 #define set_mb(var, value) \
        do { var = value; smp_mb(); } while (0)
 
+#define smp_llsc_mb()  __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")
+#define smp_llsc_rmb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")
+#define smp_llsc_wmb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")
+
 #endif /* __ASM_BARRIER_H */