Merge master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6

[linux-2.6-omap-h63xx.git] / include / asm-mips / irq.h

diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index 67657089efa7264b207c9555e7b186ee36648d51..97102ebc54b19d44137945dcac23833eceec6ada 100644 (file)
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -18,27 +18,27 @@
 #ifdef CONFIG_I8259
 static inline int irq_canonicalize(int irq)
 {
-       return ((irq == 2) ? 9 : irq);
+       return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
 }
 #else
 #define irq_canonicalize(irq) (irq)    /* Sane hardware, sane code ... */
 #endif
 
-#ifdef CONFIG_MIPS_MT_SMTC
+#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
 /*
  * Clear interrupt mask handling "backstop" if irq_hwmask
  * entry so indicates. This implies that the ack() or end()
  * functions will take over re-enabling the low-level mask.
  * Otherwise it will be done on return from exception.
  */
-#define __DO_IRQ_SMTC_HOOK()                                           \
+#define __DO_IRQ_SMTC_HOOK(irq)                                                \
 do {                                                                   \
        if (irq_hwmask[irq] & 0x0000ff00)                               \
                write_c0_tccontext(read_c0_tccontext() &                \
                                   ~(irq_hwmask[irq] & 0x0000ff00));    \
 } while (0)
 #else
-#define __DO_IRQ_SMTC_HOOK() do { } while (0)
+#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0)
 #endif
 
 /*
@@ -52,7 +52,7 @@ do {                                                                  \
 #define do_IRQ(irq)                                                    \
 do {                                                                   \
        irq_enter();                                                    \
-       __DO_IRQ_SMTC_HOOK();                                           \
+       __DO_IRQ_SMTC_HOOK(irq);                                        \
        generic_handle_irq(irq);                                        \
        irq_exit();                                                     \
 } while (0)
@@ -72,4 +72,13 @@ extern int allocate_irqno(void);
 extern void alloc_legacy_irqno(void);
 extern void free_irqno(unsigned int irq);
 
+/*
+ * Before R2 the timer and performance counter interrupts were both fixed to
+ * IE7.  Since R2 their number has to be read from the c0_intctl register.
+ */
+#define CP0_LEGACY_COMPARE_IRQ 7
+
+extern int cp0_compare_irq;
+extern int cp0_perfcount_irq;
+
 #endif /* _ASM_IRQ_H */