[ARM] fix cache alignment code in memset.S

[linux-2.6-omap-h63xx.git] / include / asm-parisc / smp.h

diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index dbdbd2e9fdf9304e658a6ea61a56cdf8c6688e67..306f4950e32ebe49428931c0447121b1e5d7dc3d 100644 (file)
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_SMP_H
 #define __ASM_SMP_H
 
-#include <linux/config.h>
 
 #if defined(CONFIG_SMP)
 
@@ -42,14 +41,6 @@ extern void smp_send_all_nop(void);
  
 #define PROC_CHANGE_PENALTY    15              /* Schedule penalty */
 
-#undef ENTRY_SYS_CPUS
-#ifdef ENTRY_SYS_CPUS
-#define STATE_RENDEZVOUS                       0
-#define STATE_STOPPED                          1 
-#define STATE_RUNNING                          2
-#define STATE_HALTED                           3
-#endif
-
 extern unsigned long cpu_present_mask;
 
 #define raw_smp_processor_id() (current_thread_info()->cpu)