__sched_setscheduler: don't do any policy checks when not "user"

[linux-2.6-omap-h63xx.git] / include / asm-powerpc / cpm2.h

diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h
index 4c85ed9cd43f6acc66c709f061e1e1b835c19f6a..2a6fa0183ac9dd67f554aac4a17e6c15598d12a9 100644 (file)
--- a/include/asm-powerpc/cpm2.h
+++ b/include/asm-powerpc/cpm2.h
@@ -12,6 +12,7 @@
 
 #include <asm/immap_cpm2.h>
 #include <asm/cpm.h>
+#include <sysdev/fsl_soc.h>
 
 #ifdef CONFIG_PPC_85xx
 #define CPM_MAP_ADDR (get_immrbase() + 0x80000)
@@ -78,24 +79,6 @@
 #define mk_cr_cmd(PG, SBC, MCN, OP) \
        ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
 
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* Dual Port RAM addresses.  The first 16K is available for almost
- * any CPM use, so we put the BDs there.  The first 128 bytes are
- * used for SMC1 and SMC2 parameter RAM, so we start allocating
- * BDs above that.  All of this must change when we start
- * downloading RAM microcode.
- */
-#define CPM_DATAONLY_BASE      ((uint)128)
-#define CPM_DP_NOSPACE         ((uint)0x7fffffff)
-#if defined(CONFIG_8272) || defined(CONFIG_MPC8555)
-#define CPM_DATAONLY_SIZE      ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
-#define CPM_FCC_SPECIAL_BASE   ((uint)0x00009000)
-#else
-#define CPM_DATAONLY_SIZE      ((uint)(16 * 1024) - CPM_DATAONLY_BASE)
-#define CPM_FCC_SPECIAL_BASE   ((uint)0x0000b000)
-#endif
-#endif
-
 /* The number of pages of host memory we allocate for CPM.  This is
  * done early in kernel initialization to get physically contiguous
  * pages.
@@ -107,22 +90,44 @@
  */
 extern cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor */
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
 #define cpm_dpalloc cpm_muram_alloc
 #define cpm_dpfree cpm_muram_free
 #define cpm_dpram_addr cpm_muram_addr
-#else
-extern unsigned long cpm_dpalloc(uint size, uint align);
-extern int cpm_dpfree(unsigned long offset);
-extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
-extern void cpm_dpdump(void);
-extern void *cpm_dpram_addr(unsigned long offset);
-#endif
 
-extern void cpm_setbrg(uint brg, uint rate);
-extern void cpm2_fastbrg(uint brg, uint rate, int div16);
 extern void cpm2_reset(void);
 
+/* Baud rate generators.
+*/
+#define CPM_BRG_RST            ((uint)0x00020000)
+#define CPM_BRG_EN             ((uint)0x00010000)
+#define CPM_BRG_EXTC_INT       ((uint)0x00000000)
+#define CPM_BRG_EXTC_CLK3_9    ((uint)0x00004000)
+#define CPM_BRG_EXTC_CLK5_15   ((uint)0x00008000)
+#define CPM_BRG_ATB            ((uint)0x00002000)
+#define CPM_BRG_CD_MASK                ((uint)0x00001ffe)
+#define CPM_BRG_DIV16          ((uint)0x00000001)
+
+#define CPM2_BRG_INT_CLK       (get_brgfreq())
+#define CPM2_BRG_UART_CLK      (CPM2_BRG_INT_CLK/16)
+
+extern void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src);
+
+/* This function is used by UARTS, or anything else that uses a 16x
+ * oversampled clock.
+ */
+static inline void cpm_setbrg(uint brg, uint rate)
+{
+       __cpm2_setbrg(brg, rate, CPM2_BRG_UART_CLK, 0, CPM_BRG_EXTC_INT);
+}
+
+/* This function is used to set high speed synchronous baud rate
+ * clocks.
+ */
+static inline void cpm2_fastbrg(uint brg, uint rate, int div16)
+{
+       __cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT);
+}
+
 /* Function code bits, usually generic to devices.
 */
 #define CPMFCR_GBL     ((u_char)0x20)  /* Set memory snooping */
@@ -221,17 +226,6 @@ typedef struct smc_uart {
 #define SMCM_TX                ((unsigned char)0x02)
 #define SMCM_RX                ((unsigned char)0x01)
 
-/* Baud rate generators.
-*/
-#define CPM_BRG_RST            ((uint)0x00020000)
-#define CPM_BRG_EN             ((uint)0x00010000)
-#define CPM_BRG_EXTC_INT       ((uint)0x00000000)
-#define CPM_BRG_EXTC_CLK3_9    ((uint)0x00004000)
-#define CPM_BRG_EXTC_CLK5_15   ((uint)0x00008000)
-#define CPM_BRG_ATB            ((uint)0x00002000)
-#define CPM_BRG_CD_MASK                ((uint)0x00001ffe)
-#define CPM_BRG_DIV16          ((uint)0x00000001)
-
 /* SCCs.
 */
 #define SCC_GSMRH_IRP          ((uint)0x00040000)