[IPV4]: fib hash|trie initialization

[linux-2.6-omap-h63xx.git] / include / asm-sh / atomic.h

diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h
index aabfd334462c178bbba76327a86a48a1efef70ab..c043ef003028e43fbffe622e801352ca61c3bb97 100644 (file)
--- a/include/asm-sh/atomic.h
+++ b/include/asm-sh/atomic.h
@@ -14,60 +14,19 @@ typedef struct { volatile int counter; } atomic_t;
 #define atomic_read(v)         ((v)->counter)
 #define atomic_set(v,i)                ((v)->counter = (i))
 
+#include <linux/compiler.h>
 #include <asm/system.h>
 
-/*
- * To get proper branch prediction for the main line, we must branch
- * forward to code at the end of this object's .text section, then
- * branch back to restart the operation.
- */
-
-static __inline__ void atomic_add(int i, atomic_t * v)
-{
-       unsigned long flags;
-
-       local_irq_save(flags);
-       *(long *)v += i;
-       local_irq_restore(flags);
-}
-
-static __inline__ void atomic_sub(int i, atomic_t *v)
-{
-       unsigned long flags;
-
-       local_irq_save(flags);
-       *(long *)v -= i;
-       local_irq_restore(flags);
-}
-
-static __inline__ int atomic_add_return(int i, atomic_t * v)
-{
-       unsigned long temp, flags;
-
-       local_irq_save(flags);
-       temp = *(long *)v;
-       temp += i;
-       *(long *)v = temp;
-       local_irq_restore(flags);
-
-       return temp;
-}
+#if defined(CONFIG_GUSA_RB)
+#include <asm/atomic-grb.h>
+#elif defined(CONFIG_CPU_SH4A)
+#include <asm/atomic-llsc.h>
+#else
+#include <asm/atomic-irq.h>
+#endif
 
 #define atomic_add_negative(a, v)      (atomic_add_return((a), (v)) < 0)
 
-static __inline__ int atomic_sub_return(int i, atomic_t * v)
-{
-       unsigned long temp, flags;
-
-       local_irq_save(flags);
-       temp = *(long *)v;
-       temp -= i;
-       *(long *)v = temp;
-       local_irq_restore(flags);
-
-       return temp;
-}
-
 #define atomic_dec_return(v) atomic_sub_return(1,(v))
 #define atomic_inc_return(v) atomic_add_return(1,(v))
 
@@ -87,6 +46,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
 #define atomic_inc(v) atomic_add(1,(v))
 #define atomic_dec(v) atomic_sub(1,(v))
 
+#ifndef CONFIG_GUSA_RB
 static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
 {
        int ret;
@@ -114,25 +74,10 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 
        return ret != u;
 }
-#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
-
-static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v)
-{
-       unsigned long flags;
-
-       local_irq_save(flags);
-       *(long *)v &= ~mask;
-       local_irq_restore(flags);
-}
+#endif
 
-static __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v)
-{
-       unsigned long flags;
-
-       local_irq_save(flags);
-       *(long *)v |= mask;
-       local_irq_restore(flags);
-}
+#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
+#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
 
 /* Atomic operations are already serializing on SH */
 #define smp_mb__before_atomic_dec()    barrier()
@@ -140,4 +85,5 @@ static __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v)
 #define smp_mb__before_atomic_inc()    barrier()
 #define smp_mb__after_atomic_inc()     barrier()
 
+#include <asm-generic/atomic.h>
 #endif /* __ASM_SH_ATOMIC_H */