#define L1_CACHE_SHIFT 4
-#define CCR1 0xfffc1000
-#define CCR2 0xfffc1004
+#define SH_CACHE_VALID 1
+#define SH_CACHE_UPDATED 2
+#define SH_CACHE_COMBINED 4
+#define SH_CACHE_ASSOC 8
-/* CCR1 behaves more like the traditional CCR */
-#define CCR CCR1
+#define CCR 0xfffc1000 /* CCR1 */
+#define CCR2 0xfffc1004
/*
* Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not
#define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI)
#endif /* __ASM_CPU_SH2A_CACHE_H */
-