[ARM] 4352/1: AT91: Platform data for LCD and AC97.

[linux-2.6-omap-h63xx.git] / include / asm-sparc / system.h

diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h
index 1f6b71f9e1b637f9c773e26db22dbc26e690402d..100c3eaf3c1fe439713ccedab0ea8c0e87459067 100644 (file)
--- a/include/asm-sparc/system.h
+++ b/include/asm-sparc/system.h
@@ -1,10 +1,8 @@
 /* $Id: system.h,v 1.86 2001/10/30 04:57:10 davem Exp $ */
-#include <linux/config.h>
 
 #ifndef __SPARC_SYSTEM_H
 #define __SPARC_SYSTEM_H
 
-#include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/threads.h>     /* NR_CPUS */
 #include <linux/thread_info.h>
@@ -155,7 +153,7 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
        "here:\n"                                                                       \
         : "=&r" (last)                                                                 \
         : "r" (&(current_set[hard_smp_processor_id()])),       \
-         "r" ((next)->thread_info),                            \
+         "r" (task_thread_info(next)),                         \
          "i" (TI_KPSR),                                        \
          "i" (TI_KSP),                                         \
          "i" (TI_TASK)                                         \
@@ -165,6 +163,16 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
          "o0", "o1", "o2", "o3",                   "o7");      \
        } while(0)
 
+/*
+ * On SMP systems, when the scheduler does migration-cost autodetection,
+ * it needs a way to flush as much of the CPU's caches as possible.
+ *
+ * TODO: fill this in!
+ */
+static inline void sched_cacheflush(void)
+{
+}
+
 /*
  * Changing the IRQ level on the Sparc.
  */
@@ -191,7 +199,6 @@ static inline unsigned long getipl(void)
 #define wmb()  mb()
 #define read_barrier_depends() do { } while(0)
 #define set_mb(__var, __value)  do { __var = __value; mb(); } while(0)
-#define set_wmb(__var, __value) set_mb(__var, __value)
 #define smp_mb()       __asm__ __volatile__("":::"memory")
 #define smp_rmb()      __asm__ __volatile__("":::"memory")
 #define smp_wmb()      __asm__ __volatile__("":::"memory")