/*
* IRQ line status.
*
- * Bits 0-16 are reserved for the IRQF_* bits in linux/interrupt.h
+ * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h
*
* IRQ types
*/
#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
/* Internal flags */
-#define IRQ_INPROGRESS 0x00010000 /* IRQ handler active - do not enter! */
-#define IRQ_DISABLED 0x00020000 /* IRQ disabled - do not enter! */
-#define IRQ_PENDING 0x00040000 /* IRQ pending - replay on enable */
-#define IRQ_REPLAY 0x00080000 /* IRQ has been replayed but not acked yet */
-#define IRQ_AUTODETECT 0x00100000 /* IRQ is being autodetected */
-#define IRQ_WAITING 0x00200000 /* IRQ not yet seen - for autodetection */
-#define IRQ_LEVEL 0x00400000 /* IRQ level triggered */
-#define IRQ_MASKED 0x00800000 /* IRQ masked - shouldn't be seen again */
-#define IRQ_PER_CPU 0x01000000 /* IRQ is per CPU */
+#define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */
+#define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */
+#define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */
+#define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */
+#define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */
+#define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */
+#define IRQ_LEVEL 0x00004000 /* IRQ level triggered */
+#define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */
+#define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */
+#define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */
+#define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */
+#define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */
+#define IRQ_DELAYED_DISABLE 0x00100000 /* IRQ disable (masking) happens delayed. */
+#define IRQ_WAKEUP 0x00200000 /* IRQ triggers system wakeup */
+#define IRQ_MOVE_PENDING 0x00400000 /* need to re-target IRQ destination */
+#define IRQ_NO_BALANCING 0x00800000 /* IRQ is excluded from balancing */
+
#ifdef CONFIG_IRQ_PER_CPU
# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
+# define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
#else
# define CHECK_IRQ_PER_CPU(var) 0
+# define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING
#endif
-#define IRQ_NOPROBE 0x02000000 /* IRQ is not valid for probing */
-#define IRQ_NOREQUEST 0x04000000 /* IRQ cannot be requested */
-#define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */
-#define IRQ_DELAYED_DISABLE 0x10000000 /* IRQ disable (masking) happens delayed. */
-#define IRQ_WAKEUP 0x20000000 /* IRQ triggers system wakeup */
-#define IRQ_MOVE_PENDING 0x40000000 /* need to re-target IRQ destination */
-
struct proc_dir_entry;
+struct msi_desc;
/**
* struct irq_chip - hardware interrupt chip descriptor
* @pending_mask: pending rebalanced interrupts
* @dir: /proc/irq/ procfs entry
* @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
+ * @name: flow handler name for /proc/interrupts output
*
* Pad this out to 32 bytes for cache and indexing reasons.
*/
struct irq_desc {
irq_flow_handler_t handle_irq;
struct irq_chip *chip;
+ struct msi_desc *msi_desc;
void *handler_data;
void *chip_data;
struct irqaction *action; /* IRQ action list */
cpumask_t pending_mask;
#endif
#ifdef CONFIG_PROC_FS
- struct proc_dir_entry *dir;
+ struct proc_dir_entry *dir;
#endif
+ const char *name;
} ____cacheline_aligned;
extern struct irq_desc irq_desc[NR_IRQS];
#endif /* CONFIG_GENERIC_PENDING_IRQ */
+extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask);
+extern int irq_can_set_affinity(unsigned int irq);
+
#else /* CONFIG_SMP */
#define move_native_irq(x)
#define move_masked_irq(x)
+static inline int irq_set_affinity(unsigned int irq, cpumask_t cpumask)
+{
+ return -EINVAL;
+}
+
+static inline int irq_can_set_affinity(unsigned int irq) { return 0; }
+
#endif /* CONFIG_SMP */
#ifdef CONFIG_IRQBALANCE
extern int no_irq_affinity;
+static inline int irq_balancing_disabled(unsigned int irq)
+{
+ return irq_desc[irq].status & IRQ_NO_BALANCING_MASK;
+}
+
/* Handle irq action chains: */
extern int handle_IRQ_event(unsigned int irq, struct irqaction *action);
extern void fastcall handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
extern void fastcall handle_bad_irq(unsigned int irq, struct irq_desc *desc);
-/*
- * Get a descriptive string for the highlevel handler, for
- * /proc/interrupts output:
- */
-extern const char *handle_irq_name(irq_flow_handler_t handle);
-
/*
* Monolithic do_IRQ implementation.
* (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
irq_flow_handler_t handle);
extern void
-__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained);
+set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
+ irq_flow_handler_t handle, const char *name);
+
+extern void
+__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
+ const char *name);
/*
* Set a highlevel flow handler for a given IRQ:
static inline void
set_irq_handler(unsigned int irq, irq_flow_handler_t handle)
{
- __set_irq_handler(irq, handle, 0);
+ __set_irq_handler(irq, handle, 0, NULL);
}
/*
set_irq_chained_handler(unsigned int irq,
irq_flow_handler_t handle)
{
- __set_irq_handler(irq, handle, 1);
+ __set_irq_handler(irq, handle, 1, NULL);
}
/* Handle dynamic irq creation and destruction */
extern int set_irq_data(unsigned int irq, void *data);
extern int set_irq_chip_data(unsigned int irq, void *data);
extern int set_irq_type(unsigned int irq, unsigned int type);
+extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
#define get_irq_chip(irq) (irq_desc[irq].chip)
#define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
#define get_irq_data(irq) (irq_desc[irq].handler_data)
+#define get_irq_msi(irq) (irq_desc[irq].msi_desc)
#endif /* CONFIG_GENERIC_HARDIRQS */
projects / linux-2.6-omap-h63xx.git / blobdiff