[MTD NAND] Allocate chip->buffers separately to allow it to be overridden

[linux-2.6-omap-h63xx.git] / include / linux / mtd / nand.h

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 66559272ebcb86f2f3f4f05a1f025d232a984663..cd4fe9ae8622197ca5b6d637588fc4a2f2019728 100644 (file)
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -27,6 +27,11 @@
 struct mtd_info;
 /* Scan and identify a NAND device */
 extern int nand_scan (struct mtd_info *mtd, int max_chips);
+/* Separate phases of nand_scan(), allowing board driver to intervene
+ * and override command or ECC setup according to flash type */
+extern int nand_scan_ident(struct mtd_info *mtd, int max_chips);
+extern int nand_scan_tail(struct mtd_info *mtd);
+
 /* Free resources held by the NAND device */
 extern void nand_release (struct mtd_info *mtd);
 
@@ -178,7 +183,9 @@ typedef enum {
 #define NAND_USE_FLASH_BBT     0x00010000
 /* This option skips the bbt scan during initialization. */
 #define NAND_SKIP_BBTSCAN      0x00020000
-
+/* This option is defined if the board driver allocates its own buffers
+   (e.g. because it needs them DMA-coherent */
+#define NAND_OWN_BUFFERS       0x00040000
 /* Options set by nand scan */
 /* Nand scan has allocated controller struct */
 #define NAND_CONTROLLER_ALLOC  0x80000000
@@ -202,7 +209,7 @@ typedef enum {
 struct nand_chip;
 
 /**
- * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices
+ * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
  * @lock:               protection lock
  * @active:            the mtd device which holds the controller currently
  * @wq:                        wait queue to sleep on if a NAND operation is in progress
@@ -223,12 +230,15 @@ struct nand_hw_control {
  * @total:     total number of ecc bytes per page
  * @prepad:    padding information for syndrome based ecc generators
  * @postpad:   padding information for syndrome based ecc generators
+ * @layout:    ECC layout control struct pointer
  * @hwctl:     function to control hardware ecc generator. Must only
  *             be provided if an hardware ECC is available
  * @calculate: function for ecc calculation or readback from ecc hardware
  * @correct:   function for ecc correction, matching to ecc generator (sw/hw)
  * @read_page: function to read a page according to the ecc generator requirements
  * @write_page:        function to write a page according to the ecc generator requirements
+ * @read_oob:  function to read chip OOB data
+ * @write_oob: function to write chip OOB data
  */
 struct nand_ecc_ctrl {
        nand_ecc_modes_t        mode;
@@ -300,11 +310,15 @@ struct nand_buffers {
  * @cmdfunc:           [REPLACEABLE] hardwarespecific function for writing commands to the chip
  * @waitfunc:          [REPLACEABLE] hardwarespecific function for wait on ready
  * @ecc:               [BOARDSPECIFIC] ecc control ctructure
+ * @buffers:           buffer structure for read/write
+ * @hwcontrol:         platform-specific hardware control structure
+ * @ops:               oob operation operands
  * @erase_cmd:         [INTERN] erase command write function, selectable due to AND support
  * @scan_bbt:          [REPLACEABLE] function to scan bad block table
  * @chip_delay:                [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
  * @wq:                        [INTERN] wait queue to sleep on if a NAND operation is in progress
  * @state:             [INTERN] the current state of the NAND device
+ * @oob_poi:           poison value buffer
  * @page_shift:                [INTERN] number of address bits in a page (column address bits)
  * @phys_erase_shift:  [INTERN] number of address bits in a physical eraseblock
  * @bbt_erase_shift:   [INTERN] number of address bits in a bbt entry
@@ -373,7 +387,7 @@ struct nand_chip {
        struct nand_ecclayout   *ecclayout;
 
        struct nand_ecc_ctrl ecc;
-       struct nand_buffers buffers;
+       struct nand_buffers *buffers;
        struct nand_hw_control hwcontrol;
 
        struct mtd_oob_ops ops;
@@ -400,7 +414,6 @@ struct nand_chip {
 
 /**
  * struct nand_flash_dev - NAND Flash Device ID Structure
- *
  * @name:      Identify the device type
  * @id:                device ID code
  * @pagesize:  Pagesize in bytes. Either 256 or 512 or 0
@@ -519,9 +532,8 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
 
 /**
  * struct platform_nand_chip - chip level device structure
- *
  * @nr_chips:          max. number of chips to scan for
- * @chip_offs:         chip number offset
+ * @chip_offset:       chip number offset
  * @nr_partitions:     number of partitions pointed to by partitions (or zero)
  * @partitions:                mtd partition list
  * @chip_delay:                R/B delay value in us
@@ -542,11 +554,10 @@ struct platform_nand_chip {
 
 /**
  * struct platform_nand_ctrl - controller level device structure
- *
  * @hwcontrol:         platform specific hardware control structure
  * @dev_ready:         platform specific function to read ready/busy pin
  * @select_chip:       platform specific chip select function
- * @priv_data:         private data to transport driver specific settings
+ * @priv:              private data to transport driver specific settings
  *
  * All fields are optional and depend on the hardware driver requirements
  */