Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-next

[linux-2.6-omap-h63xx.git] / sound / soc / davinci / davinci-i2s.c

diff --git a/sound/soc/davinci/davinci-i2s.c b/sound/soc/davinci/davinci-i2s.c
index 24fe9db2c75e1ffe92991ad0b29ed4c79849b0e0..0fee779e3c7601168334bc6e60506d302c9da7ab 100644 (file)
--- a/sound/soc/davinci/davinci-i2s.c
+++ b/sound/soc/davinci/davinci-i2s.c
@@ -241,10 +241,27 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
        rcr = DAVINCI_MCBSP_RCR_RFRLEN1(1);
        xcr = DAVINCI_MCBSP_XCR_XFIG | DAVINCI_MCBSP_XCR_XFRLEN1(1);
        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
-       case SND_SOC_DAIFMT_RIGHT_J:
+       case SND_SOC_DAIFMT_DSP_B:
                break;
        case SND_SOC_DAIFMT_I2S:
-       case SND_SOC_DAIFMT_DSP_B:
+               /* Davinci doesn't support TRUE I2S, but some codecs will have
+                * the left and right channels contiguous. This allows
+                * dsp_a mode to be used with an inverted normal frame clk.
+                * If your codec is master and does not have contiguous
+                * channels, then you will have sound on only one channel.
+                * Try using a different mode, or codec as slave.
+                *
+                * The TLV320AIC33 is an example of a codec where this works.
+                * It has a variable bit clock frequency allowing it to have
+                * valid data on every bit clock.
+                *
+                * The TLV320AIC23 is an example of a codec where this does not
+                * work. It has a fixed bit clock frequency with progressively
+                * more empty bit clock slots between channels as the sample
+                * rate is lowered.
+                */
+               fmt ^= SND_SOC_DAIFMT_NB_IF;
+       case SND_SOC_DAIFMT_DSP_A:
                rcr |= DAVINCI_MCBSP_RCR_RDATDLY(1);
                xcr |= DAVINCI_MCBSP_XCR_XDATDLY(1);
                break;
@@ -254,7 +271,7 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
        }
 
        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
-       case SND_SOC_DAIFMT_IB_NF:
+       case SND_SOC_DAIFMT_NB_NF:
                /* CLKRP Receive clock polarity,
                 *      1 - sampled on rising edge of CLKR
                 *      valid on rising edge
@@ -266,7 +283,7 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
                 */
                pcr |= (DAVINCI_MCBSP_PCR_CLKXP | DAVINCI_MCBSP_PCR_CLKRP);
                break;
-       case SND_SOC_DAIFMT_NB_IF:
+       case SND_SOC_DAIFMT_IB_IF:
                /* CLKRP Receive clock polarity,
                 *      0 - sampled on falling edge of CLKR
                 *      valid on falling edge
@@ -278,7 +295,7 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
                 */
                pcr |= (DAVINCI_MCBSP_PCR_FSXP | DAVINCI_MCBSP_PCR_FSRP);
                break;
-       case SND_SOC_DAIFMT_IB_IF:
+       case SND_SOC_DAIFMT_NB_IF:
                /* CLKRP Receive clock polarity,
                 *      1 - sampled on rising edge of CLKR
                 *      valid on rising edge
@@ -291,7 +308,7 @@ static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
                pcr |= (DAVINCI_MCBSP_PCR_CLKXP | DAVINCI_MCBSP_PCR_CLKRP |
                        DAVINCI_MCBSP_PCR_FSXP | DAVINCI_MCBSP_PCR_FSRP);
                break;
-       case SND_SOC_DAIFMT_NB_NF:
+       case SND_SOC_DAIFMT_IB_NF:
                /* CLKRP Receive clock polarity,
                 *      0 - sampled on falling edge of CLKR
                 *      valid on falling edge