X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;ds=sidebyside;f=arch%2Fsh64%2Fkernel%2Fpci_sh5.c;h=388bb711f1b02ec0c46dac25723dfee1fa3a95df;hb=ed6fb174eea8869e88d8bc506a55f3ef76fcb7ed;hp=49862e165c06eac7504a5b6a0f3f6895e57b35be;hpb=a9deecba19b8f384d97f82c75379da48bccb2588;p=linux-2.6-omap-h63xx.git

diff --git a/arch/sh64/kernel/pci_sh5.c b/arch/sh64/kernel/pci_sh5.c
index 49862e165c0..388bb711f1b 100644
--- a/arch/sh64/kernel/pci_sh5.c
+++ b/arch/sh64/kernel/pci_sh5.c
@@ -48,7 +48,7 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
 
-char * __init pcibios_setup(char *str)
+char * __devinit pcibios_setup(char *str)
 {
 	return str;
 }
@@ -340,8 +340,9 @@ static int __init map_cayman_irq(struct pci_dev *dev, u8 slot, u8 pin)
 	return result;
 }
 
-irqreturn_t pcish5_err_irq(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t pcish5_err_irq(int irq, void *dev_id)
 {
+	struct pt_regs *regs = get_irq_regs();
 	unsigned pci_int, pci_air, pci_cir, pci_aint;
 
 	pci_int = SH5PCI_READ(INT);
@@ -368,15 +369,13 @@ irqreturn_t pcish5_err_irq(int irq, void *dev_id, struct pt_regs *regs)
 	return IRQ_HANDLED;
 }
 
-irqreturn_t pcish5_serr_irq(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t pcish5_serr_irq(int irq, void *dev_id)
 {
 	printk("SERR IRQ\n");
 
 	return IRQ_NONE;
 }
 
-#define ROUND_UP(x, a)		(((x) + (a) - 1) & ~((a) - 1))
-
 static void __init
 pcibios_size_bridge(struct pci_bus *bus, struct resource *ior,
 		    struct resource *memr)
@@ -433,8 +432,8 @@ pcibios_size_bridge(struct pci_bus *bus, struct resource *ior,
 	mem_res.end -= mem_res.start;
 
 	/* Align the sizes up by bridge rules */
-	io_res.end = ROUND_UP(io_res.end, 4*1024) - 1;
-	mem_res.end = ROUND_UP(mem_res.end, 1*1024*1024) - 1;
+	io_res.end = ALIGN(io_res.end, 4*1024) - 1;
+	mem_res.end = ALIGN(mem_res.end, 1*1024*1024) - 1;
 
 	/* Adjust the bridge's allocation requirements */
 	bridge->resource[0].end = bridge->resource[0].start + io_res.end;
@@ -447,18 +446,16 @@ pcibios_size_bridge(struct pci_bus *bus, struct resource *ior,
 
 	/* adjust parent's resource requirements */
 	if (ior) {
-		ior->end = ROUND_UP(ior->end, 4*1024);
+		ior->end = ALIGN(ior->end, 4*1024);
 		ior->end += io_res.end;
 	}
 
 	if (memr) {
-		memr->end = ROUND_UP(memr->end, 1*1024*1024);
+		memr->end = ALIGN(memr->end, 1*1024*1024);
 		memr->end += mem_res.end;
 	}
 }
 
-#undef ROUND_UP
-
 static void __init pcibios_size_bridges(void)
 {
 	struct resource io_res, mem_res;
@@ -500,7 +497,7 @@ static int __init pcibios_init(void)
 
 subsys_initcall(pcibios_init);
 
-void __init pcibios_fixup_bus(struct pci_bus *bus)
+void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
 	struct pci_dev *dev = bus->self;
 	int i;
@@ -524,10 +521,10 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
 		bus->resource[0]->start = PCIBIOS_MIN_IO;
 		bus->resource[1]->start = PCIBIOS_MIN_MEM;
 #else
-		bus->resource[0]->end = 0
-		bus->resource[1]->end = 0
-		bus->resource[0]->start =0
-		  bus->resource[1]->start = 0;
+		bus->resource[0]->end = 0;
+		bus->resource[1]->end = 0;
+		bus->resource[0]->start =0;
+		bus->resource[1]->start = 0;
 #endif
 		/* Turn off downstream PF memory address range by default */
 		bus->resource[2]->start = 1024*1024;