X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;ds=sidebyside;f=include%2Fasm-sparc%2Fpsr.h;h=b8c0e5f0a66bbf1e4014bec94292320835914382;hb=6e4f6f6b408cf3257c65cf4f3e299c098345b72f;hp=19c9780511180f2b24378bf26dfdeff9ecb535c8;hpb=fac84ef26759a3725bfc53ae3abf21976360aff3;p=linux-2.6-omap-h63xx.git

diff --git a/include/asm-sparc/psr.h b/include/asm-sparc/psr.h
index 19c97805111..b8c0e5f0a66 100644
--- a/include/asm-sparc/psr.h
+++ b/include/asm-sparc/psr.h
@@ -1,4 +1,4 @@
-/* $Id: psr.h,v 1.15 1997/10/04 08:54:22 ecd Exp $
+/*
  * psr.h: This file holds the macros for masking off various parts of
  *        the processor status register on the Sparc. This is valid
  *        for Version 8. On the V9 this is renamed to the PSTATE
@@ -25,6 +25,7 @@
 #define PSR_PIL     0x00000f00         /* processor interrupt level  */
 #define PSR_EF      0x00001000         /* enable floating point      */
 #define PSR_EC      0x00002000         /* enable co-processor        */
+#define PSR_SYSCALL 0x00004000         /* inside of a syscall        */
 #define PSR_LE      0x00008000         /* SuperSparcII little-endian */
 #define PSR_ICC     0x00f00000         /* integer condition codes    */
 #define PSR_C       0x00100000         /* carry bit                  */