X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;ds=sidebyside;f=include%2Fasm-x86%2Fcache.h;h=1e0bac86f38f8ee4f950380e4e1845a49fec6b30;hb=4aa02396f934b355a4002ea9bc524aa42d6b53d6;hp=c36d190ac9d8f0fdeeff3405c7a019a272d26e64;hpb=ebf8889bd1fe3615991ff4494635d237280652a2;p=linux-2.6-omap-h63xx.git

diff --git a/include/asm-x86/cache.h b/include/asm-x86/cache.h
index c36d190ac9d..1e0bac86f38 100644
--- a/include/asm-x86/cache.h
+++ b/include/asm-x86/cache.h
@@ -1,5 +1,20 @@
-#ifdef CONFIG_X86_32
-# include "cache_32.h"
-#else
-# include "cache_64.h"
+#ifndef _ARCH_X86_CACHE_H
+#define _ARCH_X86_CACHE_H
+
+/* L1 cache line size */
+#define L1_CACHE_SHIFT	(CONFIG_X86_L1_CACHE_SHIFT)
+#define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
+
+#define __read_mostly __attribute__((__section__(".data.read_mostly")))
+
+#ifdef CONFIG_X86_VSMP
+/* vSMP Internode cacheline shift */
+#define INTERNODE_CACHE_SHIFT (12)
+#ifdef CONFIG_SMP
+#define __cacheline_aligned_in_smp					\
+	__attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT))))	\
+	__attribute__((__section__(".data.page_aligned")))
+#endif
+#endif
+
 #endif