X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=Documentation%2Fmemory-barriers.txt;h=e5a819a4f0c99588fecaef9f96632e5922b5c4b4;hb=f34d7a5b7010b82fe97da95496b9971435530062;hp=650657c5473340dcd8f5ffe5f097c6776a754441;hpb=cab8e5c4444cb7d9b8035de5d81fbfd5284a02fa;p=linux-2.6-omap-h63xx.git

diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index 650657c5473..e5a819a4f0c 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -430,8 +430,8 @@ There are certain things that the Linux kernel memory barriers do not guarantee:
 
 	[*] For information on bus mastering DMA and coherency please read:
 
-	    Documentation/pci.txt
-	    Documentation/DMA-mapping.txt
+	    Documentation/PCI/pci.txt
+	    Documentation/PCI/PCI-DMA-mapping.txt
 	    Documentation/DMA-API.txt
 
 
@@ -1479,7 +1479,8 @@ kernel.
 
 Any atomic operation that modifies some state in memory and returns information
 about the state (old or new) implies an SMP-conditional general memory barrier
-(smp_mb()) on each side of the actual operation.  These include:
+(smp_mb()) on each side of the actual operation (with the exception of
+explicit lock operations, described later).  These include:
 
 	xchg();
 	cmpxchg();
@@ -1492,7 +1493,7 @@ about the state (old or new) implies an SMP-conditional general memory barrier
 	atomic_dec_and_test();
 	atomic_sub_and_test();
 	atomic_add_negative();
-	atomic_add_unless();
+	atomic_add_unless();	/* when succeeds (returns 1) */
 	test_and_set_bit();
 	test_and_clear_bit();
 	test_and_change_bit();
@@ -1536,10 +1537,19 @@ If they're used for constructing a lock of some description, then they probably
 do need memory barriers as a lock primitive generally has to do things in a
 specific order.
 
-
 Basically, each usage case has to be carefully considered as to whether memory
 barriers are needed or not.
 
+The following operations are special locking primitives:
+
+	test_and_set_bit_lock();
+	clear_bit_unlock();
+	__clear_bit_unlock();
+
+These implement LOCK-class and UNLOCK-class operations. These should be used in
+preference to other operations when implementing locking primitives, because
+their implementations can be optimised on many architectures.
+
 [!] Note that special memory barrier primitives are available for these
 situations because on some CPUs the atomic instructions used imply full memory
 barriers, and so barrier instructions are superfluous in conjunction with them,