X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Farm%2Fboot%2Fcompressed%2Fhead.S;h=3c2c8f2a1dc4f4e6a4da9dc0bd50b4b4447d42c4;hb=3ebb5a2b44b02bddd5fbf0f29d71f1df6146c2c3;hp=d7fb5ee1637e8f25e23edcd69b7acbeca019b539;hpb=b43035a5ec4deecd43019728ab9347df82dd121f;p=linux-2.6-omap-h63xx.git

diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index d7fb5ee1637..3c2c8f2a1dc 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -31,7 +31,7 @@
 		.macro	loadsp, rb
 		.endm
 		.macro	writeb, ch, rb
-		mcr	p14, 0, \ch, c0, c1, 0
+		mcr	p14, 0, \ch, c1, c0, 0
 		.endm
 #endif
 
@@ -55,7 +55,7 @@
 #elif defined(CONFIG_ARCH_S3C2410)
 		.macro loadsp, rb
 		mov	\rb, #0x50000000
-		add	\rb, \rb, #0x4000 * CONFIG_S3C2410_LOWLEVEL_UART_PORT
+		add	\rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
 		.endm
 #else
 		.macro	loadsp,	rb
@@ -623,6 +623,12 @@ proc_types:
 		b	__armv4_mmu_cache_off
 		b	__armv4_mmu_cache_flush
 
+		.word	0x56055310		@ Feroceon
+		.word	0xfffffff0
+		b	__armv4_mmu_cache_on
+		b	__armv4_mmu_cache_off
+		b	__armv5tej_mmu_cache_flush
+
 		@ These match on the architecture ID
 
 		.word	0x00020000		@ ARMv4T
@@ -641,7 +647,7 @@ proc_types:
 		.word	0x000f0000
 		b	__armv4_mmu_cache_on
 		b	__armv4_mmu_cache_off
-		b	__armv4_mmu_cache_flush
+		b	__armv5tej_mmu_cache_flush
 
 		.word	0x0007b000		@ ARMv6
 		.word	0x000ff000
@@ -821,6 +827,13 @@ iflush:
 		mcr	p15, 0, r10, c7, c10, 4	@ drain WB
 		mov	pc, lr
 
+__armv5tej_mmu_cache_flush:
+1:		mrc	p15, 0, r15, c7, c14, 3	@ test,clean,invalidate D cache
+		bne	1b
+		mcr	p15, 0, r0, c7, c5, 0	@ flush I cache
+		mcr	p15, 0, r0, c7, c10, 4	@ drain WB
+		mov	pc, lr
+
 __armv4_mmu_cache_flush:
 		mov	r2, #64*1024		@ default: 32K dcache size (*2)
 		mov	r11, #32		@ default: 32 byte line size