X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Farm%2Fmach-at91%2Fboard-cap9adk.c;h=83a1a0fef47be359b7138f4584d734a6f1ff5ae0;hb=7eb19553369c46cc1fa64caf120cbcab1b597f7c;hp=201b89392dcc4ec91555b9d139ee87757b8a1004;hpb=accba5f3965d6a9d1bf7c1e1a7995d17e9d521b6;p=linux-2.6-omap-h63xx.git diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index 201b89392dc..83a1a0fef47 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c @@ -36,17 +36,16 @@ #include #include #include -#include #include #include -#include #include #include #include #include +#include "sam9_smc.h" #include "generic.h" @@ -195,6 +194,43 @@ static struct atmel_nand_data __initdata cap9adk_nand_data = { #endif }; +static struct sam9_smc_config __initdata cap9adk_nand_smc_config = { + .ncs_read_setup = 1, + .nrd_setup = 2, + .ncs_write_setup = 1, + .nwe_setup = 2, + + .ncs_read_pulse = 6, + .nrd_pulse = 4, + .ncs_write_pulse = 6, + .nwe_pulse = 4, + + .read_cycle = 8, + .write_cycle = 8, + + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, + .tdf_cycles = 1, +}; + +static void __init cap9adk_add_device_nand(void) +{ + unsigned long csa; + + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); + + /* setup bus-width (8 or 16) */ + if (cap9adk_nand_data.bus_width_16) + cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16; + else + cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; + + /* configure chip-select 3 (NAND) */ + sam9_smc_configure(3, &cap9adk_nand_smc_config); + + at91_add_device_nand(&cap9adk_nand_data); +} + /* * NOR flash @@ -234,6 +270,24 @@ static struct platform_device cap9adk_nor_flash = { .num_resources = ARRAY_SIZE(nor_flash_resources), }; +static struct sam9_smc_config __initdata cap9adk_nor_smc_config = { + .ncs_read_setup = 2, + .nrd_setup = 4, + .ncs_write_setup = 2, + .nwe_setup = 4, + + .ncs_read_pulse = 10, + .nrd_pulse = 8, + .ncs_write_pulse = 10, + .nwe_pulse = 8, + + .read_cycle = 16, + .write_cycle = 16, + + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16, + .tdf_cycles = 1, +}; + static __init void cap9adk_add_device_nor(void) { unsigned long csa; @@ -241,18 +295,8 @@ static __init void cap9adk_add_device_nor(void) csa = at91_sys_read(AT91_MATRIX_EBICSA); at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); - /* set the bus interface characteristics */ - at91_sys_write(AT91_SMC_SETUP(0), AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2) - | AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2)); - - at91_sys_write(AT91_SMC_PULSE(0), AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10) - | AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10)); - - at91_sys_write(AT91_SMC_CYCLE(0), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); - - at91_sys_write(AT91_SMC_MODE(0), AT91_SMC_READMODE | AT91_SMC_WRITEMODE - | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE - | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1)); + /* configure chip-select 0 (NOR) */ + sam9_smc_configure(0, &cap9adk_nor_smc_config); platform_device_register(&cap9adk_nor_flash); } @@ -330,10 +374,8 @@ static void __init cap9adk_board_init(void) /* Serial */ at91_add_device_serial(); /* USB Host */ - set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); at91_add_device_usbh(&cap9adk_usbh_data); /* USB HS */ - set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); at91_add_device_usba(&cap9adk_usba_udc_data); /* SPI */ at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); @@ -344,13 +386,12 @@ static void __init cap9adk_board_init(void) /* Ethernet */ at91_add_device_eth(&cap9adk_macb_data); /* NAND */ - at91_add_device_nand(&cap9adk_nand_data); + cap9adk_add_device_nand(); /* NOR Flash */ cap9adk_add_device_nor(); /* I2C */ at91_add_device_i2c(NULL, 0); /* LCD Controller */ - set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); at91_add_device_lcdc(&cap9adk_lcdc_data); /* AC97 */ at91_add_device_ac97(&cap9adk_ac97_data);