X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Farm%2Fmach-iop13xx%2Fpci.c;h=99d94cb1bafdc6818e96d4edc6bc64fbeb152a71;hb=f92a629cf75b4f1df46fd8bc0a345ea3d3246281;hp=d1d0d32ca77c886b3f2d3a1d7d8d6be1a312034d;hpb=972d45fb43f0f0793fa275c4a22998106760cd61;p=linux-2.6-omap-h63xx.git diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index d1d0d32ca77..99d94cb1baf 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c @@ -19,10 +19,11 @@ #include #include - +#include #include #include #include +#include #include #include @@ -144,7 +145,7 @@ void iop13xx_map_pci_memory(void) } } -static inline int iop13xx_atu_function(int atu) +static int iop13xx_atu_function(int atu) { int func = 0; /* the function number depends on the value of the @@ -259,7 +260,7 @@ static int iop13xx_atux_pci_status(int clear) * data. Note that the data dependency on %0 encourages an abort * to be detected before we return. */ -static inline u32 iop13xx_atux_read(unsigned long addr) +static u32 iop13xx_atux_read(unsigned long addr) { u32 val; @@ -387,7 +388,7 @@ static int iop13xx_atue_pci_status(int clear) return err; } -static inline int __init +static int iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) { WARN_ON(idsel != 0); @@ -401,7 +402,7 @@ iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) } } -static inline u32 iop13xx_atue_read(unsigned long addr) +static u32 iop13xx_atue_read(unsigned long addr) { u32 val; @@ -559,6 +560,14 @@ void __init iop13xx_atue_setup(void) int func = iop13xx_atu_function(IOP13XX_INIT_ATU_ATUE); u32 reg_val; +#ifdef CONFIG_PCI_MSI + /* BAR 0 (inbound msi window) */ + __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR); + __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUE_IALR0); + __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUE_IATVR0); + __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUE_IABAR0); +#endif + /* BAR 1 (1:1 mapping with Physical RAM) */ /* Set limit and enable */ __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1, @@ -720,6 +729,14 @@ void __init iop13xx_atux_setup(void) else atux_trhfa_timeout = jiffies; +#ifdef CONFIG_PCI_MSI + /* BAR 0 (inbound msi window) */ + __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR); + __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUX_IALR0); + __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUX_IATVR0); + __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUX_IABAR0); +#endif + /* BAR 1 (1:1 mapping with Physical RAM) */ /* Set limit and enable */ __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1, @@ -973,7 +990,7 @@ void __init iop13xx_pci_init(void) "imprecise external abort"); } -/* intialize the pci memory space. handle any combination of +/* initialize the pci memory space. handle any combination of * atue and atux enabled/disabled */ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) @@ -985,11 +1002,10 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) if (nr > 1) return 0; - res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL); + res = kcalloc(2, sizeof(struct resource), GFP_KERNEL); if (!res) panic("PCI: unable to alloc resources"); - memset(res, 0, sizeof(struct resource) * 2); /* 'nr' assumptions: * ATUX is always 0