X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Farm%2Fplat-omap%2Fdsp%2Fdsp_common.h;h=2ef1e58bb07824b246dad7b7dea55aef9b336239;hb=5669d107117726fb431567917c2b40646dbd7fd2;hp=36034bd8ae42beaccca54bc89c11437646fe8ed7;hpb=2ab8c553830d542e9d206d271a7b80eec199fdc4;p=linux-2.6-omap-h63xx.git diff --git a/arch/arm/plat-omap/dsp/dsp_common.h b/arch/arm/plat-omap/dsp/dsp_common.h index 36034bd8ae4..2ef1e58bb07 100644 --- a/arch/arm/plat-omap/dsp/dsp_common.h +++ b/arch/arm/plat-omap/dsp/dsp_common.h @@ -1,31 +1,40 @@ /* - * linux/arch/arm/mach-omap/dsp/dsp_common.h + * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1) * - * Header for OMAP DSP driver static part + * Copyright (C) 2002-2006 Nokia Corporation. All rights reserved. * - * Copyright (C) 2002-2005 Nokia Corporation + * Contact: Toshihiro Kobayashi * - * Written by Toshihiro Kobayashi + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA * - * 2005/06/13: DSP Gateway version 3.3 */ +#ifndef DRIVER_DSP_COMMON_H +#define DRIVER_DSP_COMMON_H + +#include +#include #include "hardware_dsp.h" +#ifdef CONFIG_ARCH_OMAP2 +#include "../../mach-omap2/prm.h" +#include "../../mach-omap2/prm_regbits_24xx.h" +#include "../../mach-omap2/cm.h" +#include "../../mach-omap2/cm_regbits_24xx.h" +#endif + #define DSPSPACE_SIZE 0x1000000 #define omap_set_bit_regw(b,r) \ @@ -36,48 +45,41 @@ do { omap_writel(omap_readl(r) | (b), (r)); } while(0) #define omap_clr_bit_regl(b,r) \ do { omap_writel(omap_readl(r) & ~(b), (r)); } while(0) +#define omap_set_bits_regl(val,mask,r) \ + do { omap_writel((omap_readl(r) & ~(mask)) | (val), (r)); } while(0) #define dspword_to_virt(dw) ((void *)(dspmem_base + ((dw) << 1))) #define dspbyte_to_virt(db) ((void *)(dspmem_base + (db))) -#define virt_to_dspword(va) (((unsigned long)(va) - dspmem_base) >> 1) -#define virt_to_dspbyte(va) ((unsigned long)(va) - dspmem_base) +#define virt_to_dspword(va) \ + ((dsp_long_t)(((unsigned long)(va) - dspmem_base) >> 1)) +#define virt_to_dspbyte(va) \ + ((dsp_long_t)((unsigned long)(va) - dspmem_base)) #define is_dsp_internal_mem(va) \ (((unsigned long)(va) >= dspmem_base) && \ ((unsigned long)(va) < dspmem_base + dspmem_size)) #define is_dspbyte_internal_mem(db) ((db) < dspmem_size) #define is_dspword_internal_mem(dw) (((dw) << 1) < dspmem_size) +#ifdef CONFIG_ARCH_OMAP1 /* * MPUI byteswap/wordswap on/off * default setting: wordswap = all, byteswap = APIMEM only */ #define mpui_wordswap_on() \ - do { \ - omap_writel( \ - (omap_readl(MPUI_CTRL) & ~MPUI_CTRL_WORDSWAP_MASK) | \ - MPUI_CTRL_WORDSWAP_ALL, MPUI_CTRL); \ - } while(0) + omap_set_bits_regl(MPUI_CTRL_WORDSWAP_ALL, MPUI_CTRL_WORDSWAP_MASK, \ + MPUI_CTRL) #define mpui_wordswap_off() \ - do { \ - omap_writel( \ - (omap_readl(MPUI_CTRL) & ~MPUI_CTRL_WORDSWAP_MASK) | \ - MPUI_CTRL_WORDSWAP_NONE, MPUI_CTRL); \ - } while(0) + omap_set_bits_regl(MPUI_CTRL_WORDSWAP_NONE, MPUI_CTRL_WORDSWAP_MASK, \ + MPUI_CTRL) #define mpui_byteswap_on() \ - do { \ - omap_writel( \ - (omap_readl(MPUI_CTRL) & ~MPUI_CTRL_BYTESWAP_MASK) | \ - MPUI_CTRL_BYTESWAP_API, MPUI_CTRL); \ - } while(0) + omap_set_bits_regl(MPUI_CTRL_BYTESWAP_API, MPUI_CTRL_BYTESWAP_MASK, \ + MPUI_CTRL) #define mpui_byteswap_off() \ - do { \ - omap_writel( \ - (omap_readl(MPUI_CTRL) & ~MPUI_CTRL_BYTESWAP_MASK) | \ - MPUI_CTRL_BYTESWAP_NONE, MPUI_CTRL); \ - } while(0) + omap_set_bits_regl(MPUI_CTRL_BYTESWAP_NONE, MPUI_CTRL_BYTESWAP_MASK, \ + MPUI_CTRL) /* * TC wordswap on / off @@ -88,11 +90,7 @@ TC_ENDIANISM); \ } while(0) -#define tc_noswap() \ - do { \ - omap_writel(omap_readl(TC_ENDIANISM) & ~TC_ENDIANISM_EN, \ - TC_ENDIANISM); \ - } while(0) +#define tc_noswap() omap_clr_bit_regl(TC_ENDIANISM_EN, TC_ENDIANISM) /* * enable priority registers, EMIF, MPUI control logic @@ -101,32 +99,143 @@ #define __dsp_disable() omap_clr_bit_regw(ARM_RSTCT1_DSP_RST, ARM_RSTCT1) #define __dsp_run() omap_set_bit_regw(ARM_RSTCT1_DSP_EN, ARM_RSTCT1) #define __dsp_reset() omap_clr_bit_regw(ARM_RSTCT1_DSP_EN, ARM_RSTCT1) +#endif /* CONFIG_ARCH_OMAP1 */ +#ifdef CONFIG_ARCH_OMAP2 +/* + * PRCM / IPI control logic + * + * REVISIT: these macros should probably be static inline functions + */ +#define __dsp_core_enable() \ + do { prm_write_mod_reg(prm_read_mod_reg(OMAP24XX_DSP_MOD, RM_RSTCTRL) \ + & ~OMAP24XX_RST1_DSP, OMAP24XX_DSP_MOD, RM_RSTCTRL); } while (0) +#define __dsp_core_disable() \ + do { prm_write_mod_reg(prm_read_mod_reg(OMAP24XX_DSP_MOD, RM_RSTCTRL) \ + | OMAP24XX_RST1_DSP, OMAP24XX_DSP_MOD, RM_RSTCTRL); } while (0) +#define __dsp_per_enable() \ + do { prm_write_mod_reg(prm_read_mod_reg(OMAP24XX_DSP_MOD, RM_RSTCTRL) \ + & ~OMAP24XX_RST2_DSP, OMAP24XX_DSP_MOD, RM_RSTCTRL); } while (0) +#define __dsp_per_disable() \ + do { prm_write_mod_reg(prm_read_mod_reg(OMAP24XX_DSP_MOD, RM_RSTCTRL) \ + | OMAP24XX_RST2_DSP, OMAP24XX_DSP_MOD, RM_RSTCTRL); } while (0) +#endif /* CONFIG_ARCH_OMAP2 */ + +typedef u32 dsp_long_t; /* must have ability to carry TADD_ABORTADR */ + +#if defined(CONFIG_ARCH_OMAP1) extern struct clk *dsp_ck_handle; extern struct clk *api_ck_handle; -extern unsigned long dspmem_base, dspmem_size, - daram_base, daram_size, - saram_base, saram_size; +#elif defined(CONFIG_ARCH_OMAP2) +extern struct clk *dsp_fck_handle; +extern struct clk *dsp_ick_handle; +#endif +extern dsp_long_t dspmem_base, dspmem_size, + daram_base, daram_size, + saram_base, saram_size; -enum e_cpustat { +enum cpustat_e { CPUSTAT_RESET = 0, - CPUSTAT_GBL_IDLE = 1, - CPUSTAT_CPU_IDLE = 2, - CPUSTAT_RUN = 3 +#ifdef CONFIG_ARCH_OMAP1 + CPUSTAT_GBL_IDLE, + CPUSTAT_CPU_IDLE, +#endif + CPUSTAT_RUN, + CPUSTAT_MAX }; -#define cpustat_name(stat) \ - ((stat == CPUSTAT_RESET) ? "RESET" :\ - (stat == CPUSTAT_GBL_IDLE) ? "GBL_IDLE" :\ - (stat == CPUSTAT_CPU_IDLE) ? "CPU_IDLE" :\ - (stat == CPUSTAT_RUN) ? "RUN" :\ - "unknown") - -int dsp_set_rstvect(unsigned long adr); -void dsp_set_idle_boot_base(unsigned long adr, size_t size); -void dsp_cpustat_request(enum e_cpustat req); -enum e_cpustat dsp_cpustat_get_stat(void); -unsigned short dsp_cpustat_get_icrmask(void); -void dsp_cpustat_set_icrmask(unsigned short mask); +int dsp_set_rstvect(dsp_long_t adr); +dsp_long_t dsp_get_rstvect(void); +void dsp_set_idle_boot_base(dsp_long_t adr, size_t size); +void dsp_reset_idle_boot_base(void); +void dsp_cpustat_request(enum cpustat_e req); +enum cpustat_e dsp_cpustat_get_stat(void); +u16 dsp_cpustat_get_icrmask(void); +void dsp_cpustat_set_icrmask(u16 mask); void dsp_register_mem_cb(int (*req_cb)(void), void (*rel_cb)(void)); void dsp_unregister_mem_cb(void); + +#if defined(CONFIG_ARCH_OMAP1) +static inline void dsp_clk_enable(void) {} +static inline void dsp_clk_disable(void) {} +#elif defined(CONFIG_ARCH_OMAP2) +static inline void dsp_clk_enable(void) +{ + u32 r; + + /*XXX should be handled in mach-omap[1,2] XXX*/ + prm_write_mod_reg(OMAP24XX_FORCESTATE | (1 << OMAP_POWERSTATE_SHIFT), + OMAP24XX_DSP_MOD, PM_PWSTCTRL); + + r = cm_read_mod_reg(OMAP24XX_DSP_MOD, CM_AUTOIDLE); + r |= OMAP2420_AUTO_DSP_IPI; + cm_write_mod_reg(r, OMAP24XX_DSP_MOD, CM_AUTOIDLE); + + r = cm_read_mod_reg(OMAP24XX_DSP_MOD, CM_CLKSTCTRL); + r |= OMAP24XX_AUTOSTATE_DSP; + cm_write_mod_reg(r, OMAP24XX_DSP_MOD, CM_CLKSTCTRL); + + clk_enable(dsp_fck_handle); + clk_enable(dsp_ick_handle); + __dsp_per_enable(); +} +static inline void dsp_clk_disable(void) +{ + __dsp_per_disable(); + clk_disable(dsp_ick_handle); + clk_disable(dsp_fck_handle); + + prm_write_mod_reg(OMAP24XX_FORCESTATE | (3 << OMAP_POWERSTATE_SHIFT), + OMAP24XX_DSP_MOD, PM_PWSTCTRL); +} +#endif + +struct dsp_kfunc_device { + char *name; + struct clk *fck; + struct clk *ick;; + spinlock_t lock; + int enabled; + int type; +#define DSP_KFUNC_DEV_TYPE_COMMON 1 +#define DSP_KFUNC_DEV_TYPE_AUDIO 2 + + struct list_head entry; + + int (*probe)(struct dsp_kfunc_device *, int); + int (*remove)(struct dsp_kfunc_device *, int); + int (*enable)(struct dsp_kfunc_device *, int); + int (*disable)(struct dsp_kfunc_device *, int); +}; + +extern int dsp_kfunc_device_register(struct dsp_kfunc_device *); + +struct dsp_platform_data { + struct list_head kdev_list; +}; + +struct omap_dsp { + struct mutex lock; + int enabled; /* stored peripheral status */ + struct omap_mmu *mmu; + struct omap_mbox *mbox; + struct device *dev; + struct list_head *kdev_list; + int initialized; +}; + +#if defined(CONFIG_ARCH_OMAP1) +#define command_dvfs_stop(m) (0) +#define command_dvfs_start(m) (0) +#elif defined(CONFIG_ARCH_OMAP2) +#define command_dvfs_stop(m) \ + (((m)->cmd_l == KFUNC_POWER) && ((m)->data == DVFS_STOP)) +#define command_dvfs_start(m) \ + (((m)->cmd_l == KFUNC_POWER) && ((m)->data == DVFS_START)) +#endif + +extern struct omap_dsp *omap_dsp; + +extern int dsp_late_init(void); + +#endif /* DRIVER_DSP_COMMON_H */