X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Fblackfin%2Fmach-bf537%2Fhead.S;h=48cd58a410a0b75e8a55b02e0a87b2566701bdc8;hb=e1441b9a41c33aa9236008a7cfe49a8e723fb397;hp=3014fe8dd1556bf717421422873e1f7ead28ab04;hpb=e86908614f2c7fec401827e5cefd7a6ea9407f85;p=linux-2.6-omap-h63xx.git diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S index 3014fe8dd15..48cd58a410a 100644 --- a/arch/blackfin/mach-bf537/head.S +++ b/arch/blackfin/mach-bf537/head.S @@ -37,9 +37,6 @@ #include #endif -.global __rambase -.global __ramstart -.global __ramend .extern ___bss_stop .extern ___bss_start .extern _bf53x_relocate_l1_mem @@ -180,40 +177,28 @@ ENTRY(__start) SSYNC; #endif -#ifdef CONFIG_BF537_PORT_H - p0.h = hi(PORTH_FER); - p0.l = lo(PORTH_FER); - R0.L = W[P0]; /* Read */ - SSYNC; - R0 = 0x0000; - W[P0] = R0.L; /* Write */ - SSYNC; - W[P0] = R0.L; /* Disable peripheral function of PORTH */ - SSYNC; -#endif - /* Initialise UART - when booting from u-boot, the UART is not disabled * so if we dont initalize here, our serial console gets hosed */ - p0.h = hi(UART_LCR); - p0.l = lo(UART_LCR); + p0.h = hi(BFIN_UART_LCR); + p0.l = lo(BFIN_UART_LCR); r0 = 0x0(Z); w[p0] = r0.L; /* To enable DLL writes */ ssync; - p0.h = hi(UART_DLL); - p0.l = lo(UART_DLL); + p0.h = hi(BFIN_UART_DLL); + p0.l = lo(BFIN_UART_DLL); r0 = 0x0(Z); w[p0] = r0.L; ssync; - p0.h = hi(UART_DLH); - p0.l = lo(UART_DLH); + p0.h = hi(BFIN_UART_DLH); + p0.l = lo(BFIN_UART_DLH); r0 = 0x00(Z); w[p0] = r0.L; ssync; - p0.h = hi(UART_GCTL); - p0.l = lo(UART_GCTL); + p0.h = hi(BFIN_UART_GCTL); + p0.l = lo(BFIN_UART_GCTL); r0 = 0x0(Z); w[p0] = r0.L; /* To enable UART clock */ ssync; @@ -483,18 +468,3 @@ ENTRY(_start_dma_code) RTS; ENDPROC(_start_dma_code) #endif /* CONFIG_BFIN_KERNEL_CLOCK */ - -.data - -/* - * Set up the usable of RAM stuff. Size of RAM is determined then - * an initial stack set up at the end. - */ - -.align 4 -__rambase: -.long 0 -__ramstart: -.long 0 -__ramend: -.long 0