X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Fmips%2Fau1000%2Fcommon%2Fsetup.c;h=1ac6b06f42a369ef8e8d578bf33c72ef99eafe44;hb=7fecc34e07e02b4d9dab1a1f4bf7fdac0a656b9b;hp=0e86f7a6b4a7f5ad60fa1a24cab5b14d7c815508;hpb=2c4aabcca847ac4c92aa5e960c3f6053e1051b62;p=linux-2.6-omap-h63xx.git diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c index 0e86f7a6b4a..1ac6b06f42a 100644 --- a/arch/mips/au1000/common/setup.c +++ b/arch/mips/au1000/common/setup.c @@ -1,7 +1,6 @@ /* - * Copyright 2000 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * ppopov@mvista.com or source@mvista.com + * Copyright 2000, 2007-2008 MontaVista Software Inc. + * Author: MontaVista Software, Inc. cpu_bclk; - if (bclk) - { + if (sp->cpu_bclk) { /* Enable BCLK switching */ - bclk = au_readl(0xB190003C); - au_writel(bclk | 0x60, 0xB190003C); - printk("BCLK switching enabled!\n"); + bclk = au_readl(SYS_POWERCTRL); + au_writel(bclk | 0x60, SYS_POWERCTRL); + printk(KERN_INFO "BCLK switching enabled!\n"); } - if (sp->cpu_od) { - /* Various early Au1000 Errata corrected by this */ - set_c0_config(1<<19); /* Set Config[OD] */ - } - else { + if (sp->cpu_od) + /* Various early Au1xx0 errata corrected by this */ + set_c0_config(1 << 19); /* Set Config[OD] */ + else /* Clear to obtain best system bus performance */ - clear_c0_config(1<<19); /* Clear Config[OD] */ - } + clear_c0_config(1 << 19); /* Clear Config[OD] */ argptr = prom_getcmdline(); #ifdef CONFIG_SERIAL_8250_CONSOLE - if ((argptr = strstr(argptr, "console=")) == NULL) { + argptr = strstr(argptr, "console="); + if (argptr == NULL) { argptr = prom_getcmdline(); strcat(argptr, " console=ttyS0,115200"); } #endif #ifdef CONFIG_FB_AU1100 - if ((argptr = strstr(argptr, "video=")) == NULL) { - argptr = prom_getcmdline(); - /* default panel */ - /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ - } + argptr = strstr(argptr, "video="); + if (argptr == NULL) { + argptr = prom_getcmdline(); + /* default panel */ + /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ + } #endif - #if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000) /* au1000 does not support vra, au1500 and au1100 do */ strcat(argptr, " au1000_audio=vra"); @@ -129,7 +125,7 @@ void __init plat_mem_setup(void) /* This routine should be valid for all Au1x based boards */ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) { - /* Don't fixup 36 bit addresses */ + /* Don't fixup 36-bit addresses */ if ((phys_addr >> 32) != 0) return phys_addr; @@ -145,17 +141,17 @@ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) } #endif - /* All Au1x SOCs have a pcmcia controller */ - /* We setup our 32 bit pseudo addresses to be equal to the - * 36 bit addr >> 4, to make it easier to check the address + /* + * All Au1xx0 SOCs have a PCMCIA controller. + * We setup our 32-bit pseudo addresses to be equal to the + * 36-bit addr >> 4, to make it easier to check the address * and fix it. - * The Au1x socket 0 phys attribute address is 0xF 4000 0000. + * The PCMCIA socket 0 physical attribute address is 0xF 4000 0000. * The pseudo address we use is 0xF400 0000. Any address over - * 0xF400 0000 is a pcmcia pseudo address. + * 0xF400 0000 is a PCMCIA pseudo address. */ - if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) { + if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) return (phys_t)(phys_addr << 4); - } /* default nop */ return phys_addr;