X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Fmips%2Fcobalt%2Firq.c;h=0b75f4fb719570ef4a8f29be227e8c1f3d5d00d0;hb=00ab956f2fefd3673edc16df55beed21834b7bdd;hp=0d90851f925ea6fecadbb6d0f968c64846b1472f;hpb=7211bb9b64f17b23834d91fc3d0c1d78671ee9a8;p=linux-2.6-omap-h63xx.git

diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index 0d90851f925..0b75f4fb719 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -18,9 +18,7 @@
 #include <asm/gt64120.h>
 #include <asm/ptrace.h>
 
-#include <asm/cobalt/cobalt.h>
-
-extern void cobalt_handle_int(void);
+#include <asm/mach-cobalt/cobalt.h>
 
 /*
  * We have two types of interrupts that we handle, ones that come in through
@@ -79,7 +77,7 @@ static inline void via_pic_irq(struct pt_regs *regs)
 		do_IRQ(irq, regs);
 }
 
-asmlinkage void cobalt_irq(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
 {
 	unsigned pending;
 
@@ -122,8 +120,6 @@ void __init arch_init_irq(void)
 	 */
 	GALILEO_OUTL(0, GT_INTRMASK_OFS);
 
-	set_except_vector(0, cobalt_handle_int);
-
 	init_i8259_irqs();				/*  0 ... 15 */
 	mips_cpu_irq_init(COBALT_CPU_IRQ);		/* 16 ... 23 */