X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Fmips%2Fkernel%2Fentry.S;h=0b78fcbf044ab563453850fe8d404ca3615b6053;hb=6e96783f586cc0a64651087cb518209a8577123f;hp=766655f352508db89fa12941f614e7a84df2d7c3;hpb=0a7d5f8ce960e74fa22986bda4af488539796e49;p=linux-2.6-omap-h63xx.git diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index 766655f3525..0b78fcbf044 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S @@ -20,21 +20,22 @@ #include #endif -#ifdef CONFIG_PREEMPT - .macro preempt_stop - .endm -#else - .macro preempt_stop - local_irq_disable - .endm +#ifndef CONFIG_PREEMPT #define resume_kernel restore_all +#else +#define __ret_from_irq ret_from_exception #endif .text .align 5 +#ifndef CONFIG_PREEMPT FEXPORT(ret_from_exception) - preempt_stop + local_irq_disable # preempt stop + b __ret_from_irq +#endif FEXPORT(ret_from_irq) + LONG_S s0, TI_REGS($28) +FEXPORT(__ret_from_irq) LONG_L t0, PT_STATUS(sp) # returning to kernel mode? andi t0, t0, KU_USER beqz t0, resume_kernel @@ -79,8 +80,10 @@ FEXPORT(syscall_exit) FEXPORT(restore_all) # restore full frame #ifdef CONFIG_MIPS_MT_SMTC /* Detect and execute deferred IPI "interrupts" */ - move a0,sp + LONG_L s0, TI_REGS($28) + LONG_S sp, TI_REGS($28) jal deferred_smtc_ipi + LONG_S s0, TI_REGS($28) /* Re-arm any temporarily masked interrupts not explicitly "acked" */ mfc0 v0, CP0_TCSTATUS ori v1, v0, TCSTATUS_IXMT