X-Git-Url: http://pilppa.org/gitweb/gitweb.cgi?a=blobdiff_plain;f=arch%2Fmips%2Fkernel%2Firq-msc01.c;h=650a80ca37418f1e0399f683520c9ab54887ccd3;hb=c0f79c4cb11acca545f9802ee0e14ad3b5cc123d;hp=f8cd1ac64d88314785849eec94f3d801b49943d7;hpb=6fa0cb1141da80eed4f86155fb51931bc1c31888;p=linux-2.6-omap-h63xx.git diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index f8cd1ac64d8..650a80ca374 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -1,16 +1,17 @@ /* - * Copyright (c) 2004 MIPS Inc - * Author: chris@mips.com - * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. + * + * Copyright (c) 2004 MIPS Inc + * Author: chris@mips.com + * + * Copyright (C) 2004, 06 Ralf Baechle */ #include #include #include -#include #include #include #include @@ -115,14 +116,14 @@ static void end_msc_irq(unsigned int irq) /* * Interrupt handler for interrupts coming from SOC-it. */ -void ll_msc_irq(struct pt_regs *regs) +void ll_msc_irq(void) { unsigned int irq; /* read the interrupt vector register */ MSCIC_READ(MSC01_IC_VEC, irq); if (irq < 64) - do_IRQ(irq + irq_base, regs); + do_IRQ(irq + irq_base); else { /* Ignore spurious interrupt */ } @@ -137,7 +138,7 @@ msc_bind_eic_interrupt (unsigned int irq, unsigned int set) #define shutdown_msc_irq disable_msc_irq -struct hw_interrupt_type msc_levelirq_type = { +struct irq_chip msc_levelirq_type = { .typename = "SOC-it-Level", .startup = startup_msc_irq, .shutdown = shutdown_msc_irq, @@ -147,7 +148,7 @@ struct hw_interrupt_type msc_levelirq_type = { .end = end_msc_irq, }; -struct hw_interrupt_type msc_edgeirq_type = { +struct irq_chip msc_edgeirq_type = { .typename = "SOC-it-Edge", .startup =startup_msc_irq, .shutdown = shutdown_msc_irq,